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Searched refs:DCR (Results 1 – 6 of 6) sorted by relevance

/Zephyr-latest/drivers/pwm/
Dpwm_npcx.c141 inst->DCR = dcr; in pwm_npcx_set_cycles()
149 inst->DCR = dcr; in pwm_npcx_set_cycles()
/Zephyr-latest/dts/riscv/ite/
Dit8xxx2.dtsi556 reg = <0x00f01802 1 /* DCR */
567 reg = <0x00f01803 1 /* DCR */
578 reg = <0x00f01804 1 /* DCR */
589 reg = <0x00f01805 1 /* DCR */
600 reg = <0x00f01806 1 /* DCR */
611 reg = <0x00f01807 1 /* DCR */
622 reg = <0x00f01808 1 /* DCR */
633 reg = <0x00f01809 1 /* DCR */
/Zephyr-latest/drivers/sensor/nxp/mcux_lpcmp/
Dmcux_lpcmp.c95 config->base->DCR |= LPCMP_DCR_DAC_EN_MASK; in mcux_lpcmp_attr_set()
97 config->base->DCR &= ~LPCMP_DCR_DAC_EN_MASK; in mcux_lpcmp_attr_set()
223 val->val1 = (int32_t)((config->base->DCR) & in mcux_lpcmp_attr_get()
/Zephyr-latest/doc/hardware/peripherals/
Di3c.rst93 * BCR and DCR need to be obtained separately to populate
101 its Provisioned ID, BCR, and DCR back. Match the received
108 * Also, set the BCR and DCR fields in the device descriptor
131 basic device information such as BCR, DCR, MRL and MWL.
295 such as, its dynamic address, BCR, DCR, MRL and MWL. Therefore,
/Zephyr-latest/soc/nuvoton/npcx/common/
Dregisters.c49 NPCX_REG_OFFSET_CHECK(pwm_reg, DCR, 0x006);
/Zephyr-latest/soc/nuvoton/npcx/common/reg/
Dreg_def.h472 volatile uint16_t DCR; member