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Searched refs:DAI_INTEL_SSP_SET_BITS (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/drivers/dai/intel/ssp/
Dssp_regs_v3.h38 #define SSCR0_DSIZE(x) DAI_INTEL_SSP_SET_BITS(3, 0, (x) - 1)
41 #define SSCR0_MOT DAI_INTEL_SSP_SET_BITS(5, 4, 0)
42 #define SSCR0_TI DAI_INTEL_SSP_SET_BITS(5, 4, 1)
43 #define SSCR0_NAT DAI_INTEL_SSP_SET_BITS(5, 4, 2)
44 #define SSCR0_PSP DAI_INTEL_SSP_SET_BITS(5, 4, 3)
48 #define SSCR0_SCR(x) DAI_INTEL_SSP_SET_BITS(19, 8, x)
53 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1)
57 #define SSCR0_DLE DAI_INTEL_SSP_SET_BITS(30, 29, 0)
96 #define SSPSP_SCMODE(x) DAI_INTEL_SSP_SET_BITS(1, 0, x)
98 #define SSPSP_STRTDLY(x) DAI_INTEL_SSP_SET_BITS(6, 4, x)
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Dssp_regs_v1.h30 #define SSCR0_DSIZE(x) DAI_INTEL_SSP_SET_BITS(3, 0, (x) - 1)
33 #define SSCR0_MOT DAI_INTEL_SSP_SET_BITS(5, 4, 0)
34 #define SSCR0_TI DAI_INTEL_SSP_SET_BITS(5, 4, 1)
35 #define SSCR0_NAT DAI_INTEL_SSP_SET_BITS(5, 4, 2)
36 #define SSCR0_PSP DAI_INTEL_SSP_SET_BITS(5, 4, 3)
40 #define SSCR0_SCR(x) DAI_INTEL_SSP_SET_BITS(19, 8, x)
45 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1)
58 #define SSCR1_TFT(x) DAI_INTEL_SSP_SET_BITS(9, 6, (x) - 1)
60 #define SSCR1_RFT(x) DAI_INTEL_SSP_SET_BITS(13, 10, (x) - 1)
100 #define SSPSP_SCMODE(x) DAI_INTEL_SSP_SET_BITS(1, 0, x)
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Dssp_regs_v2.h31 #define SSCR0_DSIZE(x) DAI_INTEL_SSP_SET_BITS(3, 0, (x) - 1)
34 #define SSCR0_MOT DAI_INTEL_SSP_SET_BITS(5, 4, 0)
35 #define SSCR0_TI DAI_INTEL_SSP_SET_BITS(5, 4, 1)
36 #define SSCR0_NAT DAI_INTEL_SSP_SET_BITS(5, 4, 2)
37 #define SSCR0_PSP DAI_INTEL_SSP_SET_BITS(5, 4, 3)
41 #define SSCR0_SCR(x) DAI_INTEL_SSP_SET_BITS(19, 8, x)
46 #define SSCR0_FRDC(x) DAI_INTEL_SSP_SET_BITS(26, 24, (x) - 1)
59 #define SSCR1_TFT(x) DAI_INTEL_SSP_SET_BITS(9, 6, (x) - 1)
61 #define SSCR1_RFT(x) DAI_INTEL_SSP_SET_BITS(13, 10, (x) - 1)
101 #define SSPSP_SCMODE(x) DAI_INTEL_SSP_SET_BITS(1, 0, x)
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Dssp.h36 #define DAI_INTEL_SSP_SET_BITS(b_hi, b_lo, x) \ macro