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Searched refs:DAI_INTEL_SSP_MASK (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/drivers/dai/intel/ssp/
Dssp_regs_v3.h39 #define SSCR0_DSIZE_GET(x) (((x) & DAI_INTEL_SSP_MASK(3, 0)) + 1)
40 #define SSCR0_FRF DAI_INTEL_SSP_MASK(5, 4)
47 #define SSCR0_SCR_MASK DAI_INTEL_SSP_MASK(19, 8)
54 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1)
65 #define SSCR1_RSVD1 DAI_INTEL_SSP_MASK(15, 3)
69 #define SSCR1_RSVD21 DAI_INTEL_SSP_MASK(21, 20)
104 #define SSPSP_DMYSTOP_MASK DAI_INTEL_SSP_MASK(SSPSP_DMYSTOP_BITS - 1, 0)
111 #define SSPSP2_RFAC DAI_INTEL_SSP_MASK(9, 8)
112 #define SSPSP2_TFAC DAI_INTEL_SSP_MASK(11, 10)
113 #define SSPSP2_EFEP DAI_INTEL_SSP_MASK(13, 12)
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Dssp_regs_v1.h31 #define SSCR0_DSIZE_GET(x) (((x) & DAI_INTEL_SSP_MASK(3, 0)) + 1)
32 #define SSCR0_FRF DAI_INTEL_SSP_MASK(5, 4)
39 #define SSCR0_SCR_MASK DAI_INTEL_SSP_MASK(19, 8)
46 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1)
57 #define SSCR1_TFT_MASK DAI_INTEL_SSP_MASK(9, 6)
59 #define SSCR1_RFT_MASK DAI_INTEL_SSP_MASK(13, 10)
109 #define SSPSP_DMYSTOP_MASK DAI_INTEL_SSP_MASK(SSPSP_DMYSTOP_BITS - 1, 0)
122 #define SSTSA_GET(x) ((x) & DAI_INTEL_SSP_MASK(7, 0))
127 #define SSRSA_GET(x) ((x) & DAI_INTEL_SSP_MASK(7, 0))
162 #define SSCR3_TFL_MASK DAI_INTEL_SSP_MASK(5, 0)
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Dssp_regs_v2.h32 #define SSCR0_DSIZE_GET(x) (((x) & DAI_INTEL_SSP_MASK(3, 0)) + 1)
33 #define SSCR0_FRF DAI_INTEL_SSP_MASK(5, 4)
40 #define SSCR0_SCR_MASK DAI_INTEL_SSP_MASK(19, 8)
47 #define SSCR0_FRDC_GET(x) ((((x) & DAI_INTEL_SSP_MASK(26, 24)) >> 24) + 1)
58 #define SSCR1_TFT_MASK DAI_INTEL_SSP_MASK(9, 6)
60 #define SSCR1_RFT_MASK DAI_INTEL_SSP_MASK(13, 10)
110 #define SSPSP_DMYSTOP_MASK DAI_INTEL_SSP_MASK(SSPSP_DMYSTOP_BITS - 1, 0)
123 #define SSTSA_GET(x) ((x) & DAI_INTEL_SSP_MASK(7, 0))
128 #define SSRSA_GET(x) ((x) & DAI_INTEL_SSP_MASK(7, 0))
163 #define SSCR3_TFL_MASK DAI_INTEL_SSP_MASK(5, 0)
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Dssp.h33 #define DAI_INTEL_SSP_MASK(b_hi, b_lo) \ macro