Searched refs:CTRLA (Results 1 – 16 of 16) sorted by relevance
107 regs->COUNT8.CTRLA.bit.ENABLE = 0; in pwm_sam0_set_cycles()111 regs->COUNT8.CTRLA.bit.ENABLE = 1; in pwm_sam0_set_cycles()121 regs->COUNT16.CTRLA.bit.ENABLE = 0; in pwm_sam0_set_cycles()125 regs->COUNT16.CTRLA.bit.ENABLE = 1; in pwm_sam0_set_cycles()157 regs->COUNT8.CTRLA.bit.SWRST = 1; in pwm_sam0_init()160 regs->COUNT8.CTRLA.reg = cfg->prescaler | TC_CTRLA_MODE_COUNT8 | in pwm_sam0_init()165 regs->COUNT8.CTRLA.bit.ENABLE = 1; in pwm_sam0_init()168 regs->COUNT16.CTRLA.bit.SWRST = 1; in pwm_sam0_init()171 regs->COUNT16.CTRLA.reg = cfg->prescaler | TC_CTRLA_MODE_COUNT16 | in pwm_sam0_init()176 regs->COUNT16.CTRLA.bit.ENABLE = 1; in pwm_sam0_init()
92 regs->CTRLA.bit.ENABLE = 0; in pwm_sam0_set_cycles()96 regs->CTRLA.bit.ENABLE = 1; in pwm_sam0_set_cycles()125 regs->CTRLA.bit.SWRST = 1; in pwm_sam0_init()128 regs->CTRLA.reg = cfg->prescaler; in pwm_sam0_init()132 regs->CTRLA.bit.ENABLE = 1; in pwm_sam0_init()
554 uint32_t CTRLA = i2c->CTRLA.reg; in i2c_sam0_set_apply_bitrate() local557 CTRLA &= ~SERCOM_I2CM_CTRLA_SPEED_Msk; in i2c_sam0_set_apply_bitrate()559 CTRLA &= ~SERCOM_I2CM_CTRLA_SDAHOLD_Msk; in i2c_sam0_set_apply_bitrate()564 CTRLA |= SERCOM_I2CM_CTRLA_SPEED(0); in i2c_sam0_set_apply_bitrate()566 CTRLA |= SERCOM_I2CM_CTRLA_SDAHOLD(0x0); in i2c_sam0_set_apply_bitrate()567 i2c->CTRLA.reg = CTRLA; in i2c_sam0_set_apply_bitrate()583 CTRLA |= SERCOM_I2CM_CTRLA_SDAHOLD(0x0); in i2c_sam0_set_apply_bitrate()584 i2c->CTRLA.reg = CTRLA; in i2c_sam0_set_apply_bitrate()601 CTRLA |= SERCOM_I2CM_CTRLA_SPEED(1); in i2c_sam0_set_apply_bitrate()603 CTRLA |= SERCOM_I2CM_CTRLA_SDAHOLD(0x2); in i2c_sam0_set_apply_bitrate()[all …]
131 RTC0->CTRLA.reg &= ~RTC_MODE0_CTRLA_ENABLE; in rtc_reset()142 RTC0->CTRLA.bit.SWRST = 1; in rtc_reset()143 while (RTC0->CTRLA.bit.SWRST) { in rtc_reset()299 RTC0->CTRLA.reg = ctrl; in sys_clock_driver_init()319 RTC0->CTRLA.reg |= RTC_MODE0_CTRLA_ENABLE; in sys_clock_driver_init()
54 WDT_REGS->CTRLA.bit.ENABLE = on; in wdt_sam0_set_enable()63 return WDT_REGS->CTRLA.bit.ENABLE; in wdt_sam0_is_enabled()181 WDT_REGS->CTRLA.bit.WEN = 1; in wdt_sam0_install_timeout()197 WDT_REGS->CTRLA.bit.WEN = 0; in wdt_sam0_install_timeout()
170 NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_PBC | NVMCTRL_CTRLA_CMDEX_KEY; in flash_sam0_write_page()182 NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_WP | NVMCTRL_CTRLA_CMDEX_KEY; in flash_sam0_write_page()204 NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_ER | NVMCTRL_CTRLA_CMDEX_KEY; in flash_sam0_erase_row()414 NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_LR | in flash_sam0_write_protection()417 NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_UR | in flash_sam0_write_protection()484 NVMCTRL->CTRLA.bit.WMODE = NVMCTRL_CTRLA_WMODE_MAN_Val; in flash_sam0_init()
93 regs->CTRLA.bit.SWRST = 1; in dac_sam0_init()101 regs->CTRLA.bit.ENABLE = 1; in dac_sam0_init()
101 GCLK->CTRLA.bit.SWRST = 1; in gclk_reset()
50 #define ADC_PRESCALER(adc) ((adc)->CTRLA.bit.PRESCALER)
157 trng->CTRLA.bit.ENABLE = 1; in entropy_sam_init()
167 adc->CTRLA.bit.ENABLE = 0; in adc_sam0_channel_setup()173 adc->CTRLA.bit.ENABLE = 1; in adc_sam0_channel_setup()482 adc->CTRLA.bit.ENABLE = 1; in adc_sam0_init()
247 regs->CTRLA.bit.SWRST = 1; in usb_dc_attach()263 regs->CTRLA.reg = USB_CTRLA_MODE_DEVICE | USB_CTRLA_RUNSTDBY; in usb_dc_attach()286 regs->CTRLA.bit.ENABLE = 1; in usb_dc_attach()338 regs->CTRLA.bit.SWRST = 1; in usb_dc_reset()
401 usart->CTRLA.bit.ENABLE = 0; in uart_sam0_configure()413 SERCOM_USART_CTRLA_Type CTRLA_temp = usart->CTRLA; in uart_sam0_configure()473 usart->CTRLA = CTRLA_temp; in uart_sam0_configure()487 usart->CTRLA.bit.ENABLE = 1; in uart_sam0_configure()534 usart->CTRLA.reg = in uart_sam0_init()633 usart->CTRLA.bit.ENABLE = 1; in uart_sam0_init()
360 tc->CTRLA.reg = TC_CTRLA_MODE_COUNT32 | in counter_sam0_tc32_initialize()384 tc->CTRLA.bit.ENABLE = 1; in counter_sam0_tc32_initialize()
132 if (regs->CTRLA.reg != ctrla.reg || regs->CTRLB.reg != ctrlb.reg || in spi_sam0_configure()134 regs->CTRLA.bit.ENABLE = 0; in spi_sam0_configure()141 regs->CTRLA = ctrla; in spi_sam0_configure()
45 EIC->CTRLA.bit.ENABLE = on; in set_eic_enable()
