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Searched refs:CSR_PMPCFG_BASE (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/arch/riscv/core/
Dpmp.S12 #define CSR_PMPCFG_BASE 0x3a0 macro
81 csrw (CSR_PMPCFG_BASE + RV_REGSIZE/4 * _index), t0
102 csrw (CSR_PMPCFG_BASE + RV_REGSIZE/4 * _index), zero