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Searched refs:CPU0_DGB_PPU_IRQn (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/soc/arm/musca/s1/
Dsystem_cmsdk_musca_s1.h54 …CPU0_DGB_PPU_IRQn = 18, /* CPU0 Debug PPU Interrupt … enumerator
/Zephyr-latest/soc/arm/musca/b1/
Dsystem_cmsdk_musca_b1.h54 …CPU0_DGB_PPU_IRQn = 18, /* CPU0 Debug PPU Interrupt … enumerator