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Searched refs:CPG_NUM_DOMAINS (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_control_renesas_cpg_mssr.h15 #define CPG_NUM_DOMAINS 2 macro
37 struct cpg_clk_info_table *clk_info_table[CPG_NUM_DOMAINS];
38 const uint32_t clk_info_table_size[CPG_NUM_DOMAINS];
Dclock_control_renesas_cpg_mssr.c351 for (domain = 0; domain < CPG_NUM_DOMAINS; domain++) { in rcar_cpg_build_clock_relationship()
411 for (domain = 0; domain < CPG_NUM_DOMAINS; domain++) { in rcar_cpg_update_all_in_out_freq()