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Searched refs:CP0_STATUS (Results 1 – 4 of 4) sorted by relevance

/Zephyr-latest/arch/mips/include/mips/
Dmipsregs.h16 #define CP0_STATUS $12 macro
48 #define read_c0_status() _mips_read_32bit_c0_register(CP0_STATUS)
49 #define write_c0_status(val) _mips_write_32bit_c0_register(CP0_STATUS, val)
/Zephyr-latest/arch/mips/core/
Dswap.S42 mfc0 k0, CP0_STATUS
44 mtc0 k0, CP0_STATUS
Dreset.S26 mfc0 k0, CP0_STATUS
29 mtc0 k0, CP0_STATUS
Disr.S98 mfc0 t0, CP0_STATUS
282 mtc0 k1, CP0_STATUS