Searched refs:CMCSR0_OFFSET (Results 1 – 1 of 1) sorted by relevance
39 #define CMCSR0_OFFSET 0x010 /* control/status register 0 */ macro67 reg_val = sys_read32(TIMER_BASE_ADDR + CMCSR0_OFFSET); in cmt_isr()69 sys_write32(reg_val, TIMER_BASE_ADDR + CMCSR0_OFFSET); in cmt_isr()122 TIMER_BASE_ADDR + CMCSR0_OFFSET); in sys_clock_driver_init()135 while (sys_read32(TIMER_BASE_ADDR + CMCSR0_OFFSET) & CSR_WRITE_FLAG) { in sys_clock_driver_init()
