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Searched refs:CLK_SELECTION_REG5 (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_control_ast10x0.c42 #define CLK_SELECTION_REG5 0x314 macro
117 syscon_read_reg(syscon, CLK_SELECTION_REG5, &reg); in aspeed_clock_control_get_rate()