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Searched refs:CLKMGR_PLLM_MDIV (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/include/zephyr/drivers/clock_control/
Dclock_agilex_ll.h107 #define CLKMGR_PLLM_MDIV(x) ((x) & 0x000003ff) macro
/Zephyr-latest/drivers/clock_control/
Dclock_agilex_ll.c77 mdiv = CLKMGR_PLLM_MDIV(mmio_read_32(pllm_reg)); in get_clk_freq()