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Searched refs:CLKMGR_MAINPLL_PLLM (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/include/zephyr/drivers/clock_control/
Dclock_agilex_ll.h35 #define CLKMGR_MAINPLL_PLLM 0x48 macro
/Zephyr-latest/drivers/clock_control/
Dclock_agilex_ll.c63 pllm_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLM; in get_clk_freq()