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Searched refs:CLKMGR_MAINPLL_PLLC0 (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/include/zephyr/drivers/clock_control/
Dclock_agilex_ll.h30 #define CLKMGR_MAINPLL_PLLC0 0x34 macro
/Zephyr-latest/drivers/clock_control/
Dclock_agilex_ll.c100 mpu_clk = get_clk_freq(CLKMGR_MAINPLL_MPUCLK, CLKMGR_MAINPLL_PLLC0, in get_mpu_clk()