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Searched refs:CLKCTRL_MAINPLL_BASE_ADDR (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_control_agilex5_ll.h56 #define CLKCTRL_MAINPLL_BASE_ADDR (CLKCTRL_BASE_ADDR + CLKCTRL_MAINPLL_OFFSET) macro
57 #define CLKCTRL_MAINPLL(_reg) (CLKCTRL_MAINPLL_BASE_ADDR + CLKCTRL_MAINPLL_##_reg)