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Searched refs:CLKCTRL_CTLGRP_BASE_ADDR (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_control_agilex5_ll.h105 #define CLKCTRL_CTLGRP_BASE_ADDR (CLKCTRL_BASE_ADDR + CLKCTRL_CTLGRP_OFFSET) macro
106 #define CLKCTRL_CTLGRP(_reg) (CLKCTRL_CTLGRP_BASE_ADDR + CLKCTRL_CTLGRP_##_reg)