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Searched refs:CLKCTRL_BASE_ADDR (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/clock_control/
Dclock_control_agilex5_ll.h16 #define CLKCTRL_BASE_ADDR DT_REG_ADDR(DT_NODELABEL(clock)) macro
30 #define CLKCTRL(x) (CLKCTRL_BASE_ADDR + CLKCTRL_##_reg)
56 #define CLKCTRL_MAINPLL_BASE_ADDR (CLKCTRL_BASE_ADDR + CLKCTRL_MAINPLL_OFFSET)
83 #define CLKCTRL_PERPLL_BASE_ADDR (CLKCTRL_BASE_ADDR + CLKCTRL_PERPLL_OFFSET)
105 #define CLKCTRL_CTLGRP_BASE_ADDR (CLKCTRL_BASE_ADDR + CLKCTRL_CTLGRP_OFFSET)