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Searched refs:CCLK_96M_HCLK_48M_PCLK_24M (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/soc/telink/tlsr/tlsr951x/
Dsoc.c32 #define CCLK_96M_HCLK_48M_PCLK_24M clock_init(PLL_CLK_192M, \ macro
105 CCLK_96M_HCLK_48M_PCLK_24M; in soc_early_init_hook()