Searched refs:CCIPR3_REG (Results 1 – 3 of 3) sorted by relevance
| /Zephyr-latest/include/zephyr/dt-bindings/clock/ |
| D | stm32wba_clock.h | 80 #define CCIPR3_REG 0xE8 macro
96 #define LPUART1_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 0, CCIPR3_REG)
97 #define SPI3_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 3, CCIPR3_REG)
98 #define I2C3_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 6, CCIPR3_REG)
99 #define LPTIM1_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 10, CCIPR3_REG)
100 #define ADC_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 12, CCIPR3_REG)
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| D | stm32u5_clock.h | 86 #define CCIPR3_REG 0xE8 macro
127 #define LPUART1_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 0, CCIPR3_REG)
128 #define SPI3_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 3, CCIPR3_REG)
129 #define I2C3_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 6, CCIPR3_REG)
130 #define LPTIM34_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 8, CCIPR3_REG)
131 #define LPTIM1_SEL(val) STM32_DOMAIN_CLOCK(val, 3, 10, CCIPR3_REG)
132 #define ADCDAC_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 12, CCIPR3_REG)
133 #define DAC1_SEL(val) STM32_DOMAIN_CLOCK(val, 1, 15, CCIPR3_REG)
134 #define ADF1_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 16, CCIPR3_REG)
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| D | stm32h5_clock.h | 85 #define CCIPR3_REG 0xE0 macro
120 #define SPI1_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 0, CCIPR3_REG)
121 #define SPI2_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 3, CCIPR3_REG)
122 #define SPI3_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 6, CCIPR3_REG)
123 #define SPI4_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 9, CCIPR3_REG)
124 #define SPI5_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 12, CCIPR3_REG)
126 #define LPUART1_SEL(val) STM32_DOMAIN_CLOCK(val, 7, 24, CCIPR3_REG)
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