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Searched refs:CAVS_SHIM (Results 1 – 7 of 7) sorted by relevance

/Zephyr-latest/soc/intel/intel_adsp/cavs/
Dsram.c34 CAVS_SHIM.ldoctl = SHIM_LDOCTL_HPSRAM_LDO_ON; in hp_sram_pm_banks()
94 CAVS_SHIM.ldoctl = SHIM_LDOCTL_HPSRAM_LDO_BYPASS; in hp_sram_pm_banks()
120 CAVS_SHIM.ldoctl = SHIM_LDOCTL_LPSRAM_LDO_ON; in lp_sram_init()
141 CAVS_SHIM.ldoctl = SHIM_LDOCTL_LPSRAM_LDO_BYPASS; in lp_sram_init()
Dmultiprocessing.c102 CAVS_SHIM.clkctl |= CAVS_CLKCTL_TCPLCG(cpu_num); in soc_start_core()
103 CAVS_SHIM.pwrctl |= CAVS_PWRCTL_TCPDSPPG(cpu_num); in soc_start_core()
228 CAVS_SHIM.pwrctl &= ~CAVS_PWRCTL_TCPDSPPG(id); in soc_adsp_halt_cpu()
229 CAVS_SHIM.clkctl &= ~CAVS_CLKCTL_TCPLCG(id); in soc_adsp_halt_cpu()
236 while ((CAVS_SHIM.pwrsts & CAVS_PWRSTS_PDSPPGS(id))) { in soc_adsp_halt_cpu()
Dpower.c248 CAVS_SHIM.clkctl |= CAVS_CLKCTL_RHROSCC; in power_init()
249 while ((CAVS_SHIM.clkctl & CAVS_CLKCTL_RHROSCC) != CAVS_CLKCTL_RHROSCC) { in power_init()
260 CAVS_SHIM.clkctl = (CAVS_CLKCTL_RHROSCC | in power_init()
269 CAVS_SHIM.pwrctl |= CAVS_PWRCTL_TCPDSPPG(0); in power_init()
/Zephyr-latest/soc/intel/intel_adsp/common/
Dclk.c105 CAVS_SHIM.clkctl |= CAVS_CLKCTL_WOVCRO; in adsp_clock_init()
106 if (CAVS_SHIM.clkctl & CAVS_CLKCTL_WOVCRO) { in adsp_clock_init()
107 CAVS_SHIM.clkctl = CAVS_SHIM.clkctl & ~CAVS_CLKCTL_WOVCRO; in adsp_clock_init()
Dboot.c164 CAVS_SHIM.l2mecs = 0; in boot_core0()
/Zephyr-latest/soc/intel/intel_adsp/common/include/
Dadsp_clk.h42 #define ADSP_CLKCTL CAVS_SHIM.clkctl
/Zephyr-latest/soc/intel/intel_adsp/cavs/include/cavs25/
Dadsp_shim.h54 #define CAVS_SHIM (*((volatile struct cavs_shim *)DT_REG_ADDR(DT_NODELABEL(shim)))) macro