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Searched refs:ARM_MMU_TTBR_RGN_OUTER_WB_WA_CACHEABLE (Results 1 – 2 of 2) sorted by relevance

/Zephyr-latest/arch/arm/core/mmu/
Darm_mmu_priv.h62 #define ARM_MMU_TTBR_RGN_OUTER_WB_WA_CACHEABLE 0x1 macro
Darm_mmu.c826 reg_val |= (ARM_MMU_TTBR_RGN_OUTER_WB_WA_CACHEABLE << in z_arm_mmu_init()