Searched refs:ARM_MMU_PTE_ID_L2_PT (Results 1 – 2 of 2) sorted by relevance
521 l1_page_table.entries[l1_index].l2_page_table_ref.id = ARM_MMU_PTE_ID_L2_PT; in arm_mmu_remap_l1_section_to_l2_table()602 l1_page_table.entries[l1_index].l2_page_table_ref.id = ARM_MMU_PTE_ID_L2_PT; in arm_mmu_l2_map_page()612 } else if (l1_page_table.entries[l1_index].undefined.id == ARM_MMU_PTE_ID_L2_PT) { in arm_mmu_l2_map_page()688 if (l1_page_table.entries[l1_index].undefined.id != ARM_MMU_PTE_ID_L2_PT) { in arm_mmu_l2_unmap_page()1065 } else if (l1_page_table.entries[l1_index].undefined.id == ARM_MMU_PTE_ID_L2_PT) { in arch_page_phys_get()
35 #define ARM_MMU_PTE_ID_L2_PT 0x1 macro