Searched refs:AHB6DIV_VAL (Results 1 – 3 of 3) sorted by relevance
88 #define AHB6DIV_VAL 1 /* AHB6_CLK = CORE_CLK/2 */ macro90 #define AHB6DIV_VAL 0 /* AHB6_CLK = CORE_CLK */ macro159 #define VAL_HFCGP ((FPRED_VAL << 4) | AHB6DIV_VAL)
89 *rate = CORE_CLK/(AHB6DIV_VAL + 1); in npcx_clock_control_get_subsys_rate()171 BUILD_ASSERT(CORE_CLK / (AHB6DIV_VAL + 1) <= (MAX_OFMCLK / 2) &&172 CORE_CLK / (AHB6DIV_VAL + 1) >= MHZ(4),
99 #define AHB6DIV_VAL (DT_PROP(DT_NODELABEL(pcc), ahb6_prescaler) - 1) macro271 *rate = CORE_CLK / (AHB6DIV_VAL + 1); in npcm_clock_control_get_subsys_rate()351 priv->hfcgp = (FPRED_VAL << 4) | AHB6DIV_VAL; in npcm_clock_control_init()
