Searched refs:ADC_CTL1 (Results 1 – 1 of 1) sorted by relevance
55 #undef ADC_CTL163 #define ADC_CTL1(adc0) REG32((adc0) + 0x00000008U) macro180 ADC_CTL1(cfg->reg) |= ADC_CTL1_SWRCST; in adc_context_start_sampling()195 ADC_CTL1(cfg->reg) |= ADC_CTL1_RSTCLB; in adc_gd32_calibration()197 while (ADC_CTL1(cfg->reg) & ADC_CTL1_RSTCLB) { in adc_gd32_calibration()200 ADC_CTL1(cfg->reg) |= ADC_CTL1_CLB; in adc_gd32_calibration()202 while (ADC_CTL1(cfg->reg) & ADC_CTL1_CLB) { in adc_gd32_calibration()395 ADC_CTL1(cfg->reg) &= ~ADC_CTL1_ETSRC; in adc_gd32_init()396 ADC_CTL1(cfg->reg) |= CTL1_ETSRC(7); in adc_gd32_init()399 ADC_CTL1(cfg->reg) |= ADC_CTL1_ETERC; in adc_gd32_init()[all …]
