| /Zephyr-latest/modules/hal_infineon/wifi-host-driver/ |
| D | CMakeLists.txt | 116 set(cyw43xx_fw_bin ${hal_blobs_dir}/firmware/COMPONENT_43439/43439A0-mfgtest.bin)
117 zephyr_library_sources(${hal_wifi_dir_resources}/firmware/COMPONENT_43439/43439A0-mfgtest_bin.c)
130 set(cyw43xx_fw_bin ${hal_blobs_dir}/firmware/COMPONENT_4373/4373A0-mfgtest.bin)
131 zephyr_library_sources(${hal_wifi_dir_resources}/firmware/COMPONENT_4373/4373A0-mfgtest_bin.c)
133 set(cyw43xx_fw_bin ${hal_blobs_dir}/firmware/COMPONENT_4373/4373A0.bin)
181 set(cyw43xx_clm_bin ${hal_blobs_dir}/clm/COMPONENT_43439/43439A0-mfgtest.clm_blob)
182 zephyr_library_sources(${hal_wifi_dir_resources}/clm/COMPONENT_43439/43439A0-mfgtest_clm_blob.c)
184 set(cyw43xx_clm_bin ${hal_blobs_dir}/clm/COMPONENT_43439/43439A0.clm_blob)
198 …set(cyw43xx_clm_bin ${hal_blobs_dir}/clm/COMPONENT_4373/COMPONENT_STERLING-LWB5plus/4373A0-mfgt…
199 …${hal_wifi_dir_resources}/clm/COMPONENT_4373/COMPONENT_STERLING-LWB5plus/4373A0-mfgtest_clm_blob.c)
[all …]
|
| /Zephyr-latest/scripts/coredump/gdbstubs/arch/ |
| D | xtensa.py | 284 A0 = 89 variable in GdbRegDef_Sample_Controller.RegNum
318 A0 = 157 variable in GdbRegDef_ESP32.RegNum
350 A0 = 155 variable in GdbRegDef_ESP32S2.RegNum
380 A0 = 212 variable in GdbRegDef_ESP32S3.RegNum
421 A0 = 158 variable in GdbRegDef_Intel_Adsp_CAVS_Zephyr.RegNum
461 A0 = 256 variable in GdbRegDef_Intel_Adsp_CAVS_XCC.RegNum
496 A0 = 105 variable in GdbRegDef_DC233C.RegNum
|
| /Zephyr-latest/boards/actinius/icarus_som_dk/ |
| D | arduino_connector.dtsi | 13 gpio-map = <0 0 &gpio0 15 0>, /* A0 */
40 io-channel-map = <0 &adc 2>, /* A0 = P0.15 = AIN2 */
|
| /Zephyr-latest/arch/xtensa/core/ |
| D | README_WINDOWS.rst | 13 visible as A0-A15.
15 The first quad (A0-A3) is pointed to by a special register called
18 (respectively) A0-A3, A4-A7, A8-A11, and A12-A15.
24 A0).
31 the top two bits of the return address placed in A0.
39 top two bits from the return address in A0 and subtracts that value
61 being brought into A0-A3 (i.e. the new WINDOWBASE) has a set bit
86 The spill area for a single frame's A0-A3 registers is not in its own
101 to write a function using only A0-A3 and CALL4 calls and ignore higher
103 the top of the stack frame, immediately below the parent call's A0-A3
|
| /Zephyr-latest/tests/drivers/gpio/gpio_basic_api/boards/ |
| D | lpcxpresso55s69_lpc55s69_cpu0.overlay | 10 out-gpios = <&arduino_header 0 (GPIO_PUSH_PULL | GPIO_PULL_UP)>; /* Arduino A0 */
|
| D | lpcxpresso55s36.overlay | 7 /* loopback with arduino header A0 and A1 */
|
| /Zephyr-latest/boards/shields/x_nucleo_eeprma2/ |
| D | x_nucleo_eeprma2.overlay | 79 * Additionally they are connected to arduino pin A0 on CN8
93 /* if solder-bridge closed: arduino A0 pin on CN8 can wp */
107 /* if solder-bridge closed: arduino A0 pin on CN8 can wp */
122 /* if solder-bridge closed: arduino A0 pin on CN8 can wp */
|
| /Zephyr-latest/boards/shields/x_nucleo_idb05a1/ |
| D | x_nucleo_idb05a1.overlay | 20 irq-gpios = <&arduino_header 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* A0 */
|
| /Zephyr-latest/boards/shields/x_nucleo_bnrg2a1/ |
| D | x_nucleo_bnrg2a1.overlay | 20 irq-gpios = <&arduino_header 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* A0 */
|
| /Zephyr-latest/samples/sensor/qdec/boards/ |
| D | nrf5340dk_nrf5340_cpuapp.overlay | 29 psels = <NRF_PSEL(QDEC_A, 0, 4)>, /* Ardiuno A0 */
|
| /Zephyr-latest/boards/seeed/wio_terminal/ |
| D | grove_connectors.dtsi | 12 gpio-map = <0 0 &portb 8 0>, /* A0/D0 */
|
| /Zephyr-latest/boards/shields/x_nucleo_wb05kn1/ |
| D | x_nucleo_wb05kn1_spi.overlay | 20 irq-gpios = <&arduino_header 0 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* A0 */
|
| /Zephyr-latest/boards/shields/semtech_sx1272mb2das/ |
| D | semtech_sx1272mb2das.overlay | 23 reset-gpios = <&arduino_header 0 GPIO_ACTIVE_HIGH>; /* A0 */
|
| /Zephyr-latest/tests/drivers/adc/adc_api/boards/ |
| D | numaker_m2l31ki.overlay | 10 /* EVB's UNO Pin A2 & A0 for channel 5 & 7 --> PB5, PB7 */
|
| /Zephyr-latest/boards/st/stm32h747i_disco/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 4 0>, /* A0 */
|
| /Zephyr-latest/boards/st/stm32h7s78_dk/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioc 0 0>, /* A0 */
|
| /Zephyr-latest/boards/st/stm32l4r9i_disco/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 7 0>, /* A0 */
|
| /Zephyr-latest/boards/st/stm32l562e_dk/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 0 0>, /* A0 */
|
| /Zephyr-latest/boards/st/stm32u083c_dk/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 0 0>, /* A0 */
|
| /Zephyr-latest/boards/st/nucleo_h533re/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 0 0>, /* A0 */
|
| /Zephyr-latest/boards/st/nucleo_h7a3zi_q/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 3 0>, /* A0 */
|
| /Zephyr-latest/boards/st/nucleo_l552ze_q/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 3 0>, /* A0 */
|
| /Zephyr-latest/boards/st/nucleo_u031r8/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 0 0>, /* A0 */
|
| /Zephyr-latest/boards/st/nucleo_u083rc/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 0 0>, /* A0 */
|
| /Zephyr-latest/boards/st/nucleo_wba52cg/ |
| D | arduino_r3_connector.dtsi | 13 gpio-map = <0 0 &gpioa 7 0>, /* A0 */
|
