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Searched refs:write_reg_mask (Results 1 – 10 of 10) sorted by relevance

/Zephyr-Core-3.7.0/drivers/sensor/adi/adxl367/
Dadxl367.c43 ret = data->hw_tf->write_reg_mask(dev, ADXL367_ACT_INACT_CTL, in adxl367_setup_activity_detection()
53 ret = data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_ACT_H, ADXL367_THRESH_H_MSK, in adxl367_setup_activity_detection()
59 return data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_ACT_L, ADXL367_THRESH_L_MSK, in adxl367_setup_activity_detection()
80 ret = data->hw_tf->write_reg_mask(dev, ADXL367_ACT_INACT_CTL, in adxl367_setup_inactivity_detection()
91 ret = data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_INACT_H, ADXL367_THRESH_H_MSK, in adxl367_setup_inactivity_detection()
97 return data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_INACT_L, ADXL367_THRESH_L_MSK, in adxl367_setup_inactivity_detection()
117 ret = data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL, in adxl367_set_op_mode()
145 return data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL, in adxl367_set_autosleep()
163 return data->hw_tf->write_reg_mask(dev, ADXL367_POWER_CTL, in adxl367_set_low_noise()
184 return data->hw_tf->write_reg_mask(dev, ADXL367_ACT_INACT_CTL, in adxl367_set_act_proc_mode()
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Dadxl367_i2c.c87 .write_reg_mask = adxl367_i2c_reg_write_mask,
Dadxl367_spi.c114 .write_reg_mask = adxl367_spi_reg_write_mask,
Dadxl367_trigger.c121 ret = drv_data->hw_tf->write_reg_mask(dev, ADXL367_INTMAP1_LOWER, int_mask, int_en); in adxl367_trigger_set()
Dadxl367.h291 int (*write_reg_mask)(const struct device *dev, uint8_t reg_addr, member
/Zephyr-Core-3.7.0/drivers/sensor/adi/adxl372/
Dadxl372.c95 return data->hw_tf->write_reg_mask(dev, ADXL372_POWER_CTL, in adxl372_set_op_mode()
112 return data->hw_tf->write_reg_mask(dev, ADXL372_MEASURE, in adxl372_set_autosleep()
142 ret = data->hw_tf->write_reg_mask(dev, ADXL372_POWER_CTL, in adxl372_set_bandwidth()
148 return data->hw_tf->write_reg_mask(dev, ADXL372_MEASURE, in adxl372_set_bandwidth()
178 ret = data->hw_tf->write_reg_mask(dev, ADXL372_POWER_CTL, in adxl372_set_hpf_corner()
202 return data->hw_tf->write_reg_mask(dev, ADXL372_MEASURE, in adxl372_set_act_proc_mode()
222 return data->hw_tf->write_reg_mask(dev, ADXL372_TIMING, in adxl372_set_odr()
240 return data->hw_tf->write_reg_mask(dev, ADXL372_POWER_CTL, in adxl372_set_instant_on_th()
264 return data->hw_tf->write_reg_mask(dev, ADXL372_TIMING, in adxl372_set_wakeup_rate()
316 return data->hw_tf->write_reg_mask(dev, ADXL372_POWER_CTL, in adxl372_set_filter_settle()
Dadxl372_i2c.c88 .write_reg_mask = adxl372_i2c_reg_write_mask,
Dadxl372_spi.c102 .write_reg_mask = adxl372_spi_reg_write_mask,
Dadxl372_trigger.c133 ret = drv_data->hw_tf->write_reg_mask(dev, ADXL372_INT1_MAP, int_mask, int_en); in adxl372_trigger_set()
Dadxl372.h296 int (*write_reg_mask)(const struct device *dev, uint8_t reg_addr, member