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/Zephyr-Core-3.7.0/tests/arch/arm/arm_thread_swap/src/
Darm_thread_arch.c62 .v5 = 0x56789abc, .v6 = 0x6789abcd, .v7 = 0x789abcde, .v8 = 0x89abcdef
109 && (src->v8 == dst->v8), in verify_callee_saved()
119 src->v8, in verify_callee_saved()
127 dst->v8 in verify_callee_saved()
/Zephyr-Core-3.7.0/dts/arm/
Darmv8.1-m.dtsi19 compatible = "arm,v8.1m-nvic";
/Zephyr-Core-3.7.0/boards/96boards/nitrogen/
D96b_lscon.dtsi9 compatible = "linaro,96b-lscon-1v8";
/Zephyr-Core-3.7.0/include/zephyr/arch/arm/
Dthread.h33 uint32_t v8; /* r11 */ member
/Zephyr-Core-3.7.0/boards/sifive/hifive_unleashed/
Dhifive_unleashed.dts25 compatible = "linaro,96b-lscon-1v8";
/Zephyr-Core-3.7.0/arch/arm/core/cortex_m/
Dcoredump.c86 arch_blk.r.r11 = esf->extra_info.callee->v8; in arch_coredump_info_dump()
/Zephyr-Core-3.7.0/arch/arm/core/
Dfatal.c58 callee->v7, callee->v8, callee->psp); in esf_dump()
Dgdbstub.c64 ctx.registers[R11] = esf->extra_info.callee->v8; in z_gdb_entry()
/Zephyr-Core-3.7.0/doc/hardware/arch/
Darm_cortex_m.rst23 … | Arm v6-M | Arm v7-M | Arm v8-M | Arm v8.1-M |
174 Stack limit checking (Arm v8-M)
193 Stack overflows trigger the dedicated UsageFault exception provided by Arm v8-M.
415 the stack guard (in certain Arm v8-M configurations with :kconfig:option:`CONFIG_MPU_GAP_FILLING`
420 * When :kconfig:option:`CONFIG_HW_STACK_PROTECTION` is enabled on Arm v8-M platforms the native
440 …ption to this setting is when :kconfig:option:`CONFIG_MPU_GAP_FILLING` is disabled (Arm v8-M only);
512 In Arm v8-M processors the MPU architecture does not allow programmed MPU regions to
657 … | Arm v6-M | Arm v7-M | Arm v8-M | Arm v8.1-M |
/Zephyr-Core-3.7.0/tests/arch/arm/arm_interrupt/src/
Darm_interrupt.c52 (callee_regs->v8 /* r11 */ == 11); in check_esf_matches_expectations()
/Zephyr-Core-3.7.0/boards/firefly/roc_rk3568_pc/doc/
Dindex.rst14 RK3568 quad-core 64-bit Cortex-A55 processor, with brand new ARM v8.2-A architecture,
/Zephyr-Core-3.7.0/doc/releases/
Drelease-notes-2.6.rst15 * Added initial support for Arm v8.1-m and Cortex-M55
195 * Added initial support for Arm v8.1-m and Cortex-M55.
811 - the ``96b-lscon-3v3`` and ``96b-lscon-1v8`` :ref:`compatible properties
814 :dtcompatible:`linaro,96b-lscon-1v8`.
Drelease-notes-2.7.rst69 * Added initial support for Arm v8.1-m and Cortex-M55
1117 * :github:`38641` - Arm v8-M '_ns' renaming was applied inconsistently
Drelease-notes-3.1.rst1901 * :github:`40901` - RFC: API Change: update LVGL from v7 to v8
1937 * :github:`38305` - Update to LVGL v8
Drelease-notes-3.0.rst294 differentiation between v7 and v8 Cortex-R.
Drelease-notes-3.5.rst2303 * Library has been updated to release v8.3.7.
Drelease-notes-3.7.rst1995 https://docs.lvgl.io/8.4/CHANGELOG.html#v8-4-0-19-march-2024