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Searched refs:v7 (Results 1 – 16 of 16) sorted by relevance

/Zephyr-Core-3.7.0/tests/arch/arm/arm_thread_swap/src/
Darm_thread_arch.c62 .v5 = 0x56789abc, .v6 = 0x6789abcd, .v7 = 0x789abcde, .v8 = 0x89abcdef
108 && (src->v7 == dst->v7) in verify_callee_saved()
118 src->v7, in verify_callee_saved()
126 dst->v7, in verify_callee_saved()
/Zephyr-Core-3.7.0/include/zephyr/arch/arm/
Dthread.h32 uint32_t v7; /* r10 */ member
/Zephyr-Core-3.7.0/arch/arm/core/cortex_m/
Dcoredump.c85 arch_blk.r.r10 = esf->extra_info.callee->v7; in arch_coredump_info_dump()
/Zephyr-Core-3.7.0/arch/arc/core/mpu/
DKconfig13 v6 supports up to 32 regions. Note: MPU v5 & v7 are not supported.
/Zephyr-Core-3.7.0/arch/arm/core/
Dfatal.c58 callee->v7, callee->v8, callee->psp); in esf_dump()
Dgdbstub.c63 ctx.registers[R10] = esf->extra_info.callee->v7; in z_gdb_entry()
/Zephyr-Core-3.7.0/tests/arch/arm/arm_interrupt/src/
Darm_interrupt.c51 (callee_regs->v7 /* r10 */ == 10) && in check_esf_matches_expectations()
/Zephyr-Core-3.7.0/samples/subsys/llext/shell_loader/
DREADME.rst54 This can be built into a relocatable elf usable on arm v7 platforms. It can be
/Zephyr-Core-3.7.0/doc/hardware/arch/
Darm_cortex_m.rst23 … | | Arm v6-M | Arm v7-M …
102 In Arm v6-M and Arm v7-M architecture variants, thread stacks are additionally required to align wi…
104 …nfig:option:`CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT`, that is enforced in Arm v6-M and Arm v7-M
657 | Architecture variant | Arm v6-M | Arm v7-M | Arm …
/Zephyr-Core-3.7.0/doc/releases/
Drelease-notes-2.4.rst812 * Library has been updated to the new major release v7.0.2.
814 * It is important to note that v7 introduces multiple API changes and new
817 <https://github.com/lvgl/lvgl/releases/tag/v7.0.0>`_ for more information.
836 * Note that ROM usage is significantly higher on v7 for minimal
Drelease-notes-3.0.rst294 differentiation between v7 and v8 Cortex-R.
Drelease-notes-2.5.rst868 * Library has been updated to minor release v7.6.1
Drelease-notes-3.1.rst1901 * :github:`40901` - RFC: API Change: update LVGL from v7 to v8
Drelease-notes-3.3.rst3263 …esso55s28] flash range starts from Secure address which is not compatible with latest Jlink(v7.82a)
/Zephyr-Core-3.7.0/doc/hardware/porting/
Dboard_porting.rst464 for Arm v7-M cores.
/Zephyr-Core-3.7.0/samples/modules/tflite-micro/hello_world/train/
Dtrain_hello_world_model.ipynb280 …yHz4cLCLo6lInpVHwK3REduPmm7kXw0cchHyeu7enTVMPv2S02UqpJP7/1+bNPK1I8CswDh2y2/v7+Qudz9uqHYB/b9xo1TbVS…
3145 …d0kPYImBzA8Y7S2wf20ZghCTC5DZgc0qh71J9T6necXS5duoS/vz/+/v7UqFGD2rVrW9aFEJb//v7+GB+wf6t1uOMvvviCZcuW…