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/Zephyr-Core-3.7.0/arch/x86/
Dgen_mmu.py433 def reserve(self, virt_base, size, to_level=PT_LEVEL): argument
448 self.map_page(addr, 0, 0, True, to_level)
450 def reserve_unaligned(self, virt_base, size, to_level=PT_LEVEL): argument
459 self.reserve(mem_start, mem_size, to_level)
825 pt.reserve_unaligned(image_base_phys, image_size, to_level=PD_LEVEL)