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Searched refs:scr_reg (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.7.0/drivers/clock_control/
Dclock_agilex_ll.c28 uint32_t scr_reg; in get_ref_clk() local
32 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_1); in get_ref_clk()
33 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()
39 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_2); in get_ref_clk()
40 ref_clk = mmio_read_32(scr_reg); in get_ref_clk()
Dclock_control_agilex5_ll.c46 uint32_t scr_reg; in get_ref_clk() local
55 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_1); in get_ref_clk()
56 ref_clk = sys_read32(scr_reg); in get_ref_clk()
64 scr_reg = SOCFPGA_SYSMGR(BOOT_SCRATCH_COLD_2); in get_ref_clk()
65 ref_clk = sys_read32(scr_reg); in get_ref_clk()