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Searched refs:psel (Results 1 – 6 of 6) sorted by relevance

/Zephyr-Core-3.7.0/include/zephyr/dt-bindings/pinctrl/renesas/
Dpinctrl-ra-common.h25 #define RA_PINCFG(port, pin, psel, opt) \ argument
26 ((((psel)&PSEL_MASK) << PSEL_POS) | (((pin)&PIN_MASK) << PIN_POS) | \
31 #define RA_PINCFG__40(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
35 #define RA_PINCFG__48(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
39 #define RA_PINCFG__64(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
43 #define RA_PINCFG_100(port, pin, psel, opt) RA_PINCFG(port, pin, psel, opt) argument
Dra-pinctrl.h52 #define RA_PSEL(psel, port_num, pin_num) \ argument
53 (1 << RA_MODE_POS | psel << RA_PSEL_POS | port_num << RA_PORT_NUM_POS | \
/Zephyr-Core-3.7.0/drivers/pinctrl/
Dpinctrl_nrf.c100 uint32_t psel = NRF_GET_PIN(pins[i]); in pinctrl_configure_pins() local
114 if (psel == NRF_PIN_DISCONNECTED) { in pinctrl_configure_pins()
115 psel = PSEL_DISCONNECTED; in pinctrl_configure_pins()
121 NRF_PSEL_UART(reg, TXD) = psel; in pinctrl_configure_pins()
130 NRF_PSEL_UART(reg, RXD) = psel; in pinctrl_configure_pins()
135 NRF_PSEL_UART(reg, RTS) = psel; in pinctrl_configure_pins()
144 NRF_PSEL_UART(reg, CTS) = psel; in pinctrl_configure_pins()
151 NRF_PSEL_SPIM(reg, SCK) = psel; in pinctrl_configure_pins()
160 NRF_PSEL_SPIM(reg, MOSI) = psel; in pinctrl_configure_pins()
172 NRF_PSEL_SPIM(reg, MISO) = psel; in pinctrl_configure_pins()
[all …]
/Zephyr-Core-3.7.0/drivers/pwm/
Dpwm_nrfx.c115 static bool channel_psel_get(uint32_t channel, uint32_t *psel, in channel_psel_get() argument
118 *psel = nrf_pwm_pin_get(config->pwm.p_reg, (uint8_t)channel); in channel_psel_get()
120 return (((*psel & PWM_PSEL_OUT_CONNECT_Msk) >> PWM_PSEL_OUT_CONNECT_Pos) in channel_psel_get()
185 uint32_t psel; in pwm_nrfx_set_cycles() local
187 if (channel_psel_get(channel, &psel, config)) { in pwm_nrfx_set_cycles()
194 nrf_gpio_pin_write(psel, out_level); in pwm_nrfx_set_cycles()
269 uint32_t psel; in pwm_nrfx_init() local
271 if (channel_psel_get(i, &psel, config)) { in pwm_nrfx_init()
276 initially_inverted |= nrf_gpio_pin_out_read(psel) ? in pwm_nrfx_init()
/Zephyr-Core-3.7.0/boards/nordic/nrf9160dk/
Dboard.c228 uint32_t psel = NRF_DT_GPIOS_TO_PSEL(EXT_MEM_CTRL, control_gpios); in early_init() local
232 nrf_gpio_pin_clear(psel); in early_init()
234 nrf_gpio_pin_set(psel); in early_init()
236 nrf_gpio_cfg_output(psel); in early_init()
/Zephyr-Core-3.7.0/drivers/clock_control/
Dclock_control_lpc11u6x.c45 uint32_t msel, uint32_t psel) in syscon_setup_pll() argument
49 val |= (psel & LPC11U6X_SYS_PLL_CTRL_PSEL_MASK) << in syscon_setup_pll()