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Searched refs:main_pllc (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.7.0/drivers/clock_control/
Dclock_agilex_ll.c54 uint32_t get_clk_freq(uint32_t psrc_reg, uint32_t main_pllc, uint32_t per_pllc) in get_clk_freq() argument
64 pllc_reg = CLKMGR_MAINPLL + main_pllc; in get_clk_freq()
Dclock_control_agilex5_ll.c82 static uint32_t get_clk_freq(uint32_t psrc_reg, uint32_t main_pllc, uint32_t per_pllc) in get_clk_freq() argument
92 pllc_reg = clock_agilex5_ll.mainpll_addr + main_pllc; in get_clk_freq()