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Searched refs:litex_read8 (Results 1 – 9 of 9) sorted by relevance

/Zephyr-Core-3.7.0/drivers/serial/
Duart_litex.c57 while (litex_read8(config->txfull_addr)) { in uart_litex_poll_out()
75 if (!litex_read8(config->rxempty_addr)) { in uart_litex_poll_in()
76 *c = litex_read8(config->rxtx_addr); in uart_litex_poll_in()
99 uint8_t enable = litex_read8(config->ev_enable_addr); in uart_litex_irq_tx_enable()
103 if (!litex_read8(config->txfull_addr)) { in uart_litex_irq_tx_enable()
122 uint8_t enable = litex_read8(config->ev_enable_addr); in uart_litex_irq_tx_disable()
136 uint8_t enable = litex_read8(config->ev_enable_addr); in uart_litex_irq_rx_enable()
150 uint8_t enable = litex_read8(config->ev_enable_addr); in uart_litex_irq_rx_disable()
166 uint8_t val = litex_read8(config->txfull_addr); in uart_litex_irq_tx_ready()
183 pending = litex_read8(config->ev_pending_addr); in uart_litex_irq_rx_ready()
[all …]
/Zephyr-Core-3.7.0/drivers/i2c/
Di2c_litex.c47 litex_write8(litex_read8(addr) | mask, addr); in set_bit()
49 litex_write8(litex_read8(addr) & ~mask, addr); in set_bit()
57 return !!(litex_read8(addr) & mask); in get_bit()
98 litex_write8(litex_read8(config->write_addr) | HIGH_STATE_ON_I2C_LINES, config->write_addr); in i2c_litex_init()
/Zephyr-Core-3.7.0/drivers/hwinfo/
Dhwinfo_litex.c22 buffer[i] = litex_read8(addr); in z_impl_hwinfo_get_device_id()
/Zephyr-Core-3.7.0/drivers/ethernet/
Deth_litex_liteeth.c90 while (litex_read8(config->tx_ready_addr) == 0) { in eth_tx()
133 rxslot = litex_read8(config->rx_slot_addr); in eth_rx()
165 if (litex_read8(config->tx_ev_pending_addr) & BIT(0)) { in eth_irq_handler()
173 if (litex_read8(config->rx_ev_pending_addr) & BIT(0)) { in eth_irq_handler()
/Zephyr-Core-3.7.0/soc/litex/litex_vexriscv/
Dsoc.h16 static inline unsigned char litex_read8(unsigned long addr) in litex_read8() function
137 return litex_read8(addr); in litex_read()
/Zephyr-Core-3.7.0/drivers/i2s/
Di2s_litex.c32 uint8_t reg_data = litex_read8(reg + I2S_CONTROL_OFFSET); in i2s_enable()
44 uint8_t reg_data = litex_read8(reg + I2S_CONTROL_OFFSET); in i2s_disable()
56 uint8_t reg_data = litex_read8(reg + I2S_CONTROL_OFFSET); in i2s_reset_fifo()
122 uint8_t reg_data = litex_read8(reg + I2S_EV_ENABLE_OFFSET); in i2s_irq_enable()
137 uint8_t reg_data = litex_read8(reg + I2S_EV_ENABLE_OFFSET); in i2s_irq_disable()
149 uint8_t reg_data = litex_read8(reg + I2S_EV_PENDING_OFFSET); in i2s_clear_pending_irq()
328 int channels_concatenated = litex_read8(cfg->base + I2S_STATUS_OFFSET); in i2s_litex_configure()
/Zephyr-Core-3.7.0/drivers/spi/
Dspi_litex.c104 if (!litex_read8(dev_config->loopback_addr) != !(config->operation & SPI_MODE_LOOP)) { in spi_config()
131 while (!(litex_read8(dev_config->status_addr) & BIT(0))) { in spi_litex_send()
219 if (!(litex_read8(dev_config->status_addr) & BIT(0))) { in spi_litex_release()
Dspi_litex_litespi.c169 while (!(litex_read8(dev_config->core_master_status_addr) & in spi_litex_xfer()
179 while (!(litex_read8(dev_config->core_master_status_addr) & in spi_litex_xfer()
/Zephyr-Core-3.7.0/drivers/timer/
Dlitex_timer.c94 litex_write8(litex_read8(TIMER_EV_PENDING_ADDR), TIMER_EV_PENDING_ADDR); in sys_clock_driver_init()