Searched refs:irq2 (Results 1 – 6 of 6) sorted by relevance
| /Zephyr-Core-3.7.0/tests/kernel/gen_isr_table/src/ |
| D | main.c | 410 static void test_multi_level_bit_masks_fn(uint32_t irq1, uint32_t irq2, uint32_t irq3) in test_multi_level_bit_masks_fn() argument
415 const uint32_t hwirq2 = irq2 - 1; in test_multi_level_bit_masks_fn()
418 const bool has_l2 = irq2 > 0; in test_multi_level_bit_masks_fn()
421 const uint32_t irqn_l2 = (irq2 << l2_shift) | irqn_l1; in test_multi_level_bit_masks_fn()
479 uint32_t irq1, irq2; in ZTEST() local
484 irq2 = 1; in ZTEST()
485 test_multi_level_bit_masks_fn(irq1, irq2, 0); in ZTEST()
489 irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS) >> 1; in ZTEST()
490 test_multi_level_bit_masks_fn(irq1, irq2, 0); in ZTEST()
494 irq2 = BIT_MASK(CONFIG_2ND_LEVEL_INTERRUPT_BITS); in ZTEST()
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| /Zephyr-Core-3.7.0/tests/kernel/interrupt/src/ |
| D | dynamic_shared_irq.c | 11 unsigned int irq2; member
40 arch_irq_disconnect_dynamic(fixture.irq2, fixture.irq_priority, in dynamic_shared_irq_suite_after()
89 fixture.irq2 = get_irq_slot(fixture.irq1 + 1); in dynamic_shared_irq_suite_setup()
90 zassert_true(fixture.irq2 != TEST_INVALID_IRQ, in dynamic_shared_irq_suite_setup()
95 fixture.irq2_table_idx = fixture.irq2 - CONFIG_GEN_IRQ_START_VECTOR; in dynamic_shared_irq_suite_setup()
138 arch_irq_connect_dynamic(fixture.irq2, fixture.irq_priority, in dynamic_shared_irq_suite_before()
165 irq_enable(fixture.irq2); in ZTEST()
168 trigger_irq(fixture.irq2); in ZTEST()
180 irq_disable(fixture.irq2); in ZTEST()
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| /Zephyr-Core-3.7.0/drivers/usb_c/ppc/ |
| D | nxp_nx20p3483.c | 295 uint8_t irq1, irq2; in nx20p3483_irq_worker() local
304 ret = read_reg(dev, NX20P3483_REG_INT2, &irq2); in nx20p3483_irq_worker()
331 if (irq1 & NX20P3483_REG_INT1_OV_5VSRC || irq2 & NX20P3483_REG_INT2_OV_HVSRC) { in nx20p3483_irq_worker()
336 if (irq1 & NX20P3483_REG_INT1_RCP_5VSRC || irq2 & NX20P3483_REG_INT2_RCP_HVSRC) { in nx20p3483_irq_worker()
341 if (irq1 & NX20P3483_REG_INT1_OC_5VSRC || irq2 & NX20P3483_REG_INT2_OC_HVSRC) { in nx20p3483_irq_worker()
346 if (irq1 & NX20P3483_REG_INT1_SC_5VSRC || irq2 & NX20P3483_REG_INT2_SC_HVSRC) { in nx20p3483_irq_worker()
352 if (irq2 & NX20P3483_REG_INT2_RCP_HVSNK) { in nx20p3483_irq_worker()
357 if (irq2 & NX20P3483_REG_INT2_SC_HVSNK) { in nx20p3483_irq_worker()
362 if (irq2 & NX20P3483_REG_INT2_OV_HVSNK) { in nx20p3483_irq_worker()
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| /Zephyr-Core-3.7.0/dts/arm/renesas/ra/ |
| D | ra-cm4-common.dtsi | 131 interrupt-names = "port-irq2", "port-irq3", "port-irq6",
133 port-irq2-pins = <2>;
152 interrupt-names = "port-irq0", "port-irq1", "port-irq2",
156 port-irq2-pins = <0>;
174 interrupt-names = "port-irq0", "port-irq1", "port-irq2",
178 port-irq2-pins = <13>;
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| /Zephyr-Core-3.7.0/scripts/build/ |
| D | gen_isr_tables.py | 199 irq2 = (irq & self.int_lvl_masks[1]) >> (self.int_bits[0])
203 list_index = self.get_irq_index(irq2 - 1, 3)
210 if irq2:
212 irq2_pos = self.get_irq_baseoffset(2) + self.__max_irq_per * list_index + irq2 - 1
214 self.__log.debug('IRQ_Indx = ' + str(irq2))
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| /Zephyr-Core-3.7.0/drivers/mbox/ |
| D | mbox_nrf_bellboard_rx.c | 172 BELLBOARD_IRQ_CONFIGURE(irq2, 2); in bellboard_rx_init()
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