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Searched refs:htmr0 (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.7.0/soc/microchip/mec/mec172x/
Dpower.c53 struct htmr_regs *htmr0 = HTMR_0_XEC_REG_BASE; in z_power_soc_deep_sleep() local
93 htmr0->PRLD = 0U; /* make sure its stopped */ in z_power_soc_deep_sleep()
94 htmr0->CTRL = 0U; /* 30.5 us per tick */ in z_power_soc_deep_sleep()
95 htmr0->PRLD = 216U; /* ~6.6 ms 2x the expected lock time */ in z_power_soc_deep_sleep()
96 temp = htmr0->PRLD; in z_power_soc_deep_sleep()
98 temp = htmr0->PRLD; in z_power_soc_deep_sleep()
104 htmr0->PRLD = 0U; /* stop */ in z_power_soc_deep_sleep()
/Zephyr-Core-3.7.0/drivers/clock_control/
Dclock_control_mchp_xec.c235 struct htmr_regs *htmr0 = (struct htmr_regs *)DT_REG_ADDR(DT_NODELABEL(hibtimer0)); in pll_wait_lock_periph() local
240 htmr0->PRLD = 0; /* disable */ in pll_wait_lock_periph()
241 htmr0->CTRL = 0; /* 30.5 us units */ in pll_wait_lock_periph()
243 htmr0->PRLD = hcount; in pll_wait_lock_periph()
393 struct htmr_regs *htmr0 = (struct htmr_regs *)DT_REG_ADDR(DT_NODELABEL(hibtimer0)); in hib_timer_delay() local
404 htmr0->PRLD = 0; /* disable */ in hib_timer_delay()
405 while (htmr0->PRLD != 0) { in hib_timer_delay()
408 htmr0->CTRL = 0; /* 32k time base */ in hib_timer_delay()
411 htmr0->PRLD = hib_timer_count; in hib_timer_delay()
420 htmr0->PRLD = 0; /* disable */ in hib_timer_delay()
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