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Searched refs:gpio_regs (Results 1 – 12 of 12) sorted by relevance

/Zephyr-Core-3.7.0/drivers/pinctrl/
Dpinctrl_ene_kb1200.c64 struct gpio_regs *gpio_regs = (struct gpio_regs *)gpio_reg_bases[port]; in kb1200_config_pin() local
72 WRITE_BIT(gpio_regs->GPIOFS, pin, 0); in kb1200_config_pin()
113 WRITE_BIT(gpio_regs->GPIOFS, pin, 1); in kb1200_config_pin()
116 WRITE_BIT(gpio_regs->GPIOIE, pin, 1); in kb1200_config_pin()
119 WRITE_BIT(gpio_regs->GPIOPU, pin, 0); in kb1200_config_pin()
120 WRITE_BIT(gpio_regs->GPIOPD, pin, 0); in kb1200_config_pin()
123 WRITE_BIT(gpio_regs->GPIOPU, pin, 1); in kb1200_config_pin()
126 WRITE_BIT(gpio_regs->GPIOPD, pin, 1); in kb1200_config_pin()
130 WRITE_BIT(gpio_regs->GPIOOE, pin, 0); in kb1200_config_pin()
133 WRITE_BIT(gpio_regs->GPIOOE, pin, 1); in kb1200_config_pin()
[all …]
Dpinctrl_mchp_xec.c24 static void config_drive_slew(struct gpio_regs * const regs, uint32_t idx, uint32_t conf) in config_drive_slew()
93 struct gpio_regs * const regs = (struct gpio_regs * const)DT_INST_REG_ADDR(0); in xec_config_pin()
/Zephyr-Core-3.7.0/drivers/gpio/
Dgpio_ene_kb1200.c26 struct gpio_regs *gpio_regs; member
44 WRITE_BIT(config->gpio_regs->GPIOFS, pin, 0); in kb1200_gpio_pin_configure()
46 WRITE_BIT(config->gpio_regs->GPIOIE, pin, 1); in kb1200_gpio_pin_configure()
49 WRITE_BIT(config->gpio_regs->GPIOOD, pin, 1); in kb1200_gpio_pin_configure()
52 WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0); in kb1200_gpio_pin_configure()
55 WRITE_BIT(config->gpio_regs->GPIOPU, pin, 1); in kb1200_gpio_pin_configure()
57 WRITE_BIT(config->gpio_regs->GPIOPU, pin, 0); in kb1200_gpio_pin_configure()
60 WRITE_BIT(config->gpio_regs->GPIOD, pin, 1); in kb1200_gpio_pin_configure()
62 WRITE_BIT(config->gpio_regs->GPIOD, pin, 0); in kb1200_gpio_pin_configure()
64 WRITE_BIT(config->gpio_regs->GPIOOE, pin, 1); in kb1200_gpio_pin_configure()
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Dgpio_lpc11u6x.c109 struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *) in gpio_lpc11u6x_pin_configure() local
168 gpio_regs->set[port_num] |= BIT(pin); in gpio_lpc11u6x_pin_configure()
172 gpio_regs->clr[port_num] |= BIT(pin); in gpio_lpc11u6x_pin_configure()
181 WRITE_BIT(gpio_regs->dir[port_num], pin, flags & GPIO_OUTPUT); in gpio_lpc11u6x_pin_configure()
190 struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *) in gpio_lpc11u6x_port_get_raw() local
193 *value = gpio_regs->pin[config->port_num]; in gpio_lpc11u6x_port_get_raw()
203 struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *) in gpio_lpc11u6x_port_set_masked_raw() local
208 orig_mask = gpio_regs->mask[port_num]; in gpio_lpc11u6x_port_set_masked_raw()
210 gpio_regs->mask[port_num] = ~mask; in gpio_lpc11u6x_port_set_masked_raw()
213 gpio_regs->mpin[port_num] = value; in gpio_lpc11u6x_port_set_masked_raw()
[all …]
Dgpio_stellaris.c42 enum gpio_regs { enum
/Zephyr-Core-3.7.0/soc/microchip/mec/mec172x/
Dsoc_power_debug.h24 struct gpio_regs * const regs = in pm_dp_gpio()
25 (struct gpio_regs * const)(DT_REG_ADDR(DT_NODELABEL(gpio_000_036))); in pm_dp_gpio()
/Zephyr-Core-3.7.0/soc/microchip/mec/common/
Dsoc_i2c.c14 #define MCHP_XEC_GPIO_REG_BASE ((struct gpio_regs *)DT_REG_ADDR(DT_NODELABEL(pinctrl)))
66 struct gpio_regs *regs = MCHP_XEC_GPIO_REG_BASE; in soc_i2c_port_lines_get()
/Zephyr-Core-3.7.0/soc/ite/ec/it8xxx2/
Dsoc.c294 struct gpio_it8xxx2_regs *const gpio_regs = GPIO_IT8XXX2_REG_BASE; in ite_it8xxx2_init() local
338 gpio_regs->GPIO_GCR1 |= IT8XXX2_GPIO_U1CTRL_SIN0_SOUT0_EN; in ite_it8xxx2_init()
345 gpio_regs->GPIO_GCR21 &= ~(IT8XXX2_GPIO_GPH1VS | IT8XXX2_GPIO_GPH2VS); in ite_it8xxx2_init()
356 gpio_regs->GPIO_GCR1 |= IT8XXX2_GPIO_U2CTRL_SIN1_SOUT1_EN; in ite_it8xxx2_init()
/Zephyr-Core-3.7.0/soc/microchip/mec/common/reg/
Dmec_gpio.h16 struct gpio_regs { struct
/Zephyr-Core-3.7.0/soc/ene/kb1200/reg/
Dgpio.h13 struct gpio_regs { struct
/Zephyr-Core-3.7.0/samples/drivers/clock_control_xec/src/
Dmain.c184 static const struct gpio_regs * const gpio =
185 (struct gpio_regs *)(DT_REG_ADDR(DT_NODELABEL(gpio_000_036)));
/Zephyr-Core-3.7.0/drivers/espi/
Despi_it8xxx2.c1823 struct gpio_it8xxx2_regs *const gpio_regs = GPIO_IT8XXX2_REG_BASE; in espi_it8xxx2_enable_reset() local
1827 gpio_regs->GPIO_GCR = in espi_it8xxx2_enable_reset()
1828 (gpio_regs->GPIO_GCR & ~IT8XXX2_GPIO_GCR_ESPI_RST_EN_MASK) | in espi_it8xxx2_enable_reset()