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/Zephyr-Core-3.7.0/share/sysbuild/cmake/modules/
Dnative_simulator_sb_extensions.cmake12 # This final image is expected to have been set to assemble other dependent images into
15 # this final executable in the same place as for non-sysbuild builds.
35 # and configures the final image to assemble the child images into its final executable.
/Zephyr-Core-3.7.0/doc/services/device_mgmt/
Dsmp_transport.rst55 There are four types of types of frames: initial, partial, partial-final
56 and initial-final; each frame type differs by start marker and/or body
63 frames and finally by partial-final frame.
75 frame, here called initial-final; for the description of initial-final
114 Initial-final frame format is similar to initial frame format,
117 ``<base64-i>`` of initial-final frame, is Base64 encoded data taking
172 The ``<base64-i>`` of partial-final frame is Base64 encoding of data,
193 The CRC16 included in final type frames is calculated over only
/Zephyr-Core-3.7.0/subsys/net/lib/mqtt/
Dmqtt_transport_websocket.c114 bool final = false; in mqtt_client_websocket_write_msg() local
122 final = true; in mqtt_client_websocket_write_msg()
128 true, final, SYS_FOREVER_MS); in mqtt_client_websocket_write_msg()
/Zephyr-Core-3.7.0/include/zephyr/linker/
Dkobject-rom.ld11 * produced by gperf during the final stages of linking.
15 * during the final stages of linking (LINKER_ZEPHYR_FINAL).
Dkobject-priv-stacks.ld15 * produced by gperf during the final stages of linking.
19 * during the final stages of linking (LINKER_ZEPHYR_FINAL).
Dintlist.ld7 /* This creates a special section which is not included by the final binary,
23 * matter where this region goes as it is stripped from the final ELF image.
Dkobject-data.ld25 * produced by gperf during the final stages of linking.
29 * during the final stages of linking (LINKER_ZEPHYR_FINAL).
Dllext-sections.ld8 * Zephyr ELF for post-processing, but it is not included in the final binary.
/Zephyr-Core-3.7.0/subsys/net/ip/
Dipv4_fragment.c424 uint16_t frag_offset, bool final) in send_ipv4_fragment() argument
476 if (!final) { in send_ipv4_fragment()
493 if (final) { in send_ipv4_fragment()
592 bool final = false; in net_ipv4_send_fragmented_pkt() local
595 final = true; in net_ipv4_send_fragmented_pkt()
599 ret = send_ipv4_fragment(pkt, rand_id, fit_len, frag_offset, final); in net_ipv4_send_fragmented_pkt()
Dipv6_fragment.c594 bool final) in send_ipv6_fragment() argument
637 frag_hdr->offset = htons(((frag_offset / 8U) << 3) | !final); in send_ipv6_fragment()
664 if (final) { in send_ipv6_fragment()
756 bool final = false; in net_ipv6_send_fragmented_pkt() local
759 final = true; in net_ipv6_send_fragmented_pkt()
764 next_hdr_off, next_hdr, final); in net_ipv6_send_fragmented_pkt()
/Zephyr-Core-3.7.0/include/zephyr/net/
Dwebsocket.h154 enum websocket_opcode opcode, bool mask, bool final,
/Zephyr-Core-3.7.0/doc/hardware/peripherals/
Dmipi_dbi.rst17 #. 9 write clocks per byte, final bit is command/data selection bit
/Zephyr-Core-3.7.0/samples/modules/tflite-micro/hello_world/train/
DREADME.md56 The final model used to simulate a sine wave is displayed below. It is a
58 ReLu activations and a final fully connected output layer with as shown below.
/Zephyr-Core-3.7.0/doc/build/cmake/
Dindex.rst98 :file:`gen_defines.py` also writes the final devicetree to
138 into four stages: the pre-build, first-pass binary, final binary, and
201 by post-process steps that will impact the size of the final binary.
214 between the intermediate binary and the final binary.
229 intermediate binaries to produce the missing pieces needed for the final
286 intermediate binary will be directly used as the final binary.
299 :alt: Zephyr's build final stage
312 :alt: Zephyr's build final stage post-process
/Zephyr-Core-3.7.0/soc/espressif/esp32s2/
DKconfig.mac15 They are generated sequentially by adding 0, and 1 (respectively) to the final octet of
/Zephyr-Core-3.7.0/boards/st/nucleo_l432kc/
Dnucleo_l432kc.dts118 * Reserve the final 16 KiB for file system partition
/Zephyr-Core-3.7.0/cmake/modules/
Dconfiguration_files.cmake67 # The CONF_FILE variable is now set to its final value.
96 # The DTC_OVERLAY_FILE variable is now set to its final value.
/Zephyr-Core-3.7.0/boards/seeed/seeeduino_xiao/
Dseeeduino_xiao.dts120 * The final 16 KiB is reserved for the application.
/Zephyr-Core-3.7.0/boards/adafruit/feather_m0_basic_proto/
Dadafruit_feather_m0_basic_proto.dts97 * The final 16 KiB is reserved for the application.
/Zephyr-Core-3.7.0/boards/atmel/sam0/samd20_xpro/
Dsamd20_xpro.dts107 * The final 16 KiB is reserved for the application.
/Zephyr-Core-3.7.0/boards/adafruit/itsybitsy_m4_express/
Dadafruit_itsybitsy_m4_express.dts114 * The final 16 KiB is reserved for the application.
/Zephyr-Core-3.7.0/boards/st/nucleo_l452re/
Dnucleo_l452re_common.dtsi120 * Reserve the final 16 KiB for file system partition
/Zephyr-Core-3.7.0/boards/microchip/ev11l78a/
Dev11l78a.dts95 * The final 16 KiB is reserved for the application.
/Zephyr-Core-3.7.0/boards/arduino/zero/
Darduino_zero.dts119 * The final 16 KiB is reserved for the application.
/Zephyr-Core-3.7.0/boards/adafruit/feather_m0_lora/
Dadafruit_feather_m0_lora.dts108 * The final 16 KiB is reserved for the application.

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