| /Zephyr-latest/drivers/regulator/ |
| D | regulator_axp192.c | 69 const uint8_t enable_mask; member
99 .enable_mask = 0x01U,
118 .enable_mask = 0x01U,
137 .enable_mask = 0x02U,
156 .enable_mask = 0x07u,
174 .enable_mask = 0x04U,
192 .enable_mask = 0x08U,
210 .enable_mask = 0x01U,
230 .enable_mask = 0x02U,
251 .enable_mask = 0x04U,
[all …]
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| D | regulator_mpm54304.c | 28 uint8_t enable_mask; member
39 return i2c_reg_update_byte_dt(&config->bus, MPM54304_REG_EN, config->enable_mask, in regulator_mpm54304_enable()
40 config->enable_mask); in regulator_mpm54304_enable()
47 return i2c_reg_update_byte_dt(&config->bus, MPM54304_REG_EN, config->enable_mask, 0x00); in regulator_mpm54304_disable()
76 .enable_mask = MPM54304_##child_name##_EN_MASK, \
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| D | regulator_da1469x.c | 101 uint32_t enable_mask; member
111 .enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_CORE_ENABLE_Msk,
120 .enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_CORE_RET_ENABLE_SLEEP_Msk,
127 .enable_mask = 0,
135 .enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_RADIO_ENABLE_Msk,
145 .enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_1V8_ENABLE_Msk |
156 .enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_1V8P_ENABLE_Msk |
166 .enable_mask = CRG_TOP_POWER_CTRL_REG_LDO_3V0_RET_ENABLE_SLEEP_Msk |
196 if (config->desc->enable_mask & config->power_bits) { in regulator_da1469x_enable()
197 reg_val = CRG_TOP->POWER_CTRL_REG & ~(config->desc->enable_mask); in regulator_da1469x_enable()
[all …]
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| D | regulator_max20335.c | 48 uint8_t enable_mask; member
79 .enable_mask = MAX20335_BUCK_EN_MASK,
88 .enable_mask = MAX20335_BUCK_EN_MASK,
97 .enable_mask = MAX20335_LDO_EN_MASK,
105 .enable_mask = MAX20335_LDO_EN_MASK,
113 .enable_mask = MAX20335_LDO_EN_MASK,
125 config->desc->enable_mask, in regulator_max20335_set_enable()
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| D | regulator_pf1550.c | 89 uint8_t enable_mask; member
147 .enable_mask = PF1550_RAIL_EN,
158 .enable_mask = PF1550_RAIL_EN,
169 .enable_mask = PF1550_RAIL_EN,
180 .enable_mask = PF1550_RAIL_EN,
189 .enable_mask = PF1550_RAIL_EN,
198 .enable_mask = PF1550_RAIL_EN,
210 config->desc->enable_mask, in regulator_pf1550_set_enable()
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| D | regulator_pca9420.c | 111 uint8_t enable_mask; member
173 .enable_mask = PCA9420_MODECFG_2_SW1_EN_MASK,
187 .enable_mask = PCA9420_MODECFG_2_SW2_EN_MASK,
201 .enable_mask = PCA9420_MODECFG_2_LDO1_EN_MASK,
215 .enable_mask = PCA9420_MODECFG_2_LDO2_EN_MASK,
346 config->desc->enable_mask, en_val); in regulator_pca9420_enable()
359 config->desc->enable_mask, dis_val); in regulator_pca9420_disable()
394 config->desc->enable_mask, 0U); in regulator_pca9420_init()
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| /Zephyr-latest/kernel/ |
| D | cpu_mask.c | 19 static int cpu_mask_mod(k_tid_t thread, uint32_t enable_mask, uint32_t disable_mask) in cpu_mask_mod() argument
30 thread->base.cpu_mask |= enable_mask; in cpu_mask_mod()
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| /Zephyr-latest/include/zephyr/drivers/flash/ |
| D | stm32_flash_api_extensions.h | 69 uint64_t enable_mask; member
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| /Zephyr-latest/tests/drivers/flash/stm32/src/ |
| D | main.c | 85 wp_request.enable_mask = 0; in flash_stm32_setup()
128 wp_request.enable_mask = sector_mask; in ZTEST()
150 wp_request.enable_mask = 0; in ZTEST()
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| /Zephyr-latest/drivers/flash/ |
| D | flash_stm32_ex_op.c | 47 change_mask = request->enable_mask; in flash_stm32_ex_op_sector_wp()
57 dev, change_mask, request->enable_mask); in flash_stm32_ex_op_sector_wp()
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| /Zephyr-latest/drivers/sensor/st/lis2dh/ |
| D | lis2dh.c | 421 cfg->temperature.enable_mask, in lis2dh_init()
422 cfg->temperature.enable_mask); in lis2dh_init()
570 .enable_mask = 0xC0, \
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| D | lis2dh.h | 214 uint8_t enable_mask; member
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