Home
last modified time | relevance | path

Searched refs:dai_base (Results 1 – 4 of 4) sorted by relevance

/Zephyr-Core-3.7.0/drivers/dai/intel/ssp/
Dssp.c29 #define dai_base(dai) dai->ssp_plat_data->base macro
118 uint32_t dest = dai_base(dp) + reg; in dai_ssp_update_bits()
120 LOG_DBG("base %x, reg %x, mask %x, value %x", dai_base(dp), reg, mask, val); in dai_ssp_update_bits()
922 ret = dai_ssp_poll_for_register_delay(dai_base(dp) + SSMODyCS(dp->tdm_slot_group), in dai_ssp_empty_tx_fifo()
926 ret |= dai_ssp_poll_for_register_delay(dai_base(dp) + SSMODyCS(dp->tdm_slot_group), in dai_ssp_empty_tx_fifo()
931 ret = dai_ssp_poll_for_register_delay(dai_base(dp) + SSSR, SSSR_TNF, SSSR_TNF, in dai_ssp_empty_tx_fifo()
933 ret |= dai_ssp_poll_for_register_delay(dai_base(dp) + SSCR3, SSCR3_TFL_MASK, 0, in dai_ssp_empty_tx_fifo()
942 sssr = sys_read32(dai_base(dp) + SSSR); in dai_ssp_empty_tx_fifo()
946 sys_write32(sssr, dai_base(dp) + SSSR); in dai_ssp_empty_tx_fifo()
956 sssr = sys_read32(dai_base(dp) + SSSR); in ssp_empty_rx_fifo_on_start()
[all …]
/Zephyr-Core-3.7.0/drivers/dai/intel/hda/
Dhda.h14 #define dai_base(dai) dai->plat_data.base macro
/Zephyr-Core-3.7.0/drivers/dai/intel/alh/
Dalh.h35 #define dai_base(dai) dai->plat_data.base macro
Dalh.c149 prop->fifo_address = dai_base(dp) + offset + ALH_STREAM_OFFSET * stream_id; in dai_alh_get_properties()