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/Zephyr-Core-3.7.0/modules/hal_st/
DKconfig4 config ZEPHYR_HAL_ST_MODULE
7 config HAS_STLIB
10 config HAS_STMEMSC
15 config USE_STDC_A3G4250D
18 config USE_STDC_AIS2DW12
21 config USE_STDC_AIS328DQ
24 config USE_STDC_AIS3624DQ
27 config USE_STDC_H3LIS100DL
30 config USE_STDC_H3LIS331DL
33 config USE_STDC_HTS221
[all …]
/Zephyr-Core-3.7.0/lib/posix/options/
DKconfig.toolchain16 config TC_PROVIDES_POSIX_ASYNCHRONOUS_IO
19 config TC_PROVIDES_POSIX_BARRIERS
22 config TC_PROVIDES_POSIX_C_LANG_JUMP
25 config TC_PROVIDES_POSIX_C_LANG_MATH
28 config TC_PROVIDES_POSIX_C_LANG_SUPPORT
31 config TC_PROVIDES_POSIX_C_LANG_SUPPORT_R
34 config TC_PROVIDES_POSIX_C_LANG_WIDE_CHAR
37 config TC_PROVIDES_POSIX_C_LANG_WIDE_CHAR_EXT
40 config TC_PROVIDES_POSIX_C_LIB_EXT
43 config TC_PROVIDES_POSIX_CLOCK_SELECTION
[all …]
/Zephyr-Core-3.7.0/soc/nordic/common/
DKconfig.peripherals6 config HAS_HW_NRF_ACL
9 config HAS_HW_NRF_ADC
12 config HAS_HW_NRF_BPROT
15 config HAS_HW_NRF_CC310
18 config HAS_HW_NRF_CC312
21 config HAS_HW_NRF_CCM
24 config HAS_HW_NRF_CCM_LFLEN_8BIT
27 config HAS_HW_NRF_CCM_HEADERMASK
30 config HAS_HW_NRF_CLOCK
33 config HAS_HW_NRF_COMP
[all …]
/Zephyr-Core-3.7.0/soc/nxp/s32/s32k1/
DKconfig.soc6 config SOC_SERIES_S32K1
10 config SOC_SERIES
13 config SOC_S32K116
17 config SOC_S32K118
21 config SOC_S32K142
25 config SOC_S32K142W
29 config SOC_S32K144
33 config SOC_S32K144W
37 config SOC_S32K146
41 config SOC_S32K148
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/Zephyr-Core-3.7.0/subsys/retention/
Dretention.c86 const struct retention_config *config = dev->config; in retention_checksum() local
89 if (config->checksum_size == CHECKSUM_CRC8 || in retention_checksum()
90 config->checksum_size == CHECKSUM_CRC16 || in retention_checksum()
91 config->checksum_size == CHECKSUM_CRC32) { in retention_checksum()
92 size_t pos = config->offset + config->prefix_len; in retention_checksum()
93 size_t end = config->offset + config->size - config->checksum_size; in retention_checksum()
101 rc = retained_mem_read(config->parent, pos, buffer, read_size); in retention_checksum()
107 if (config->checksum_size == CHECKSUM_CRC8) { in retention_checksum()
110 } else if (config->checksum_size == CHECKSUM_CRC16) { in retention_checksum()
113 } else if (config->checksum_size == CHECKSUM_CRC32) { in retention_checksum()
[all …]
/Zephyr-Core-3.7.0/include/zephyr/drivers/dma/
Ddma_gd32.h10 #define GD32_DMA_CONFIG_DIRECTION(config) ((config >> 6) & 0x3) argument
11 #define GD32_DMA_CONFIG_PERIPH_ADDR_INC(config) ((config >> 9) & 0x1) argument
12 #define GD32_DMA_CONFIG_MEMORY_ADDR_INC(config) ((config >> 10) & 0x1) argument
13 #define GD32_DMA_CONFIG_PERIPH_WIDTH(config) ((config >> 11) & 0x3) argument
14 #define GD32_DMA_CONFIG_MEMORY_WIDTH(config) ((config >> 13) & 0x3) argument
15 #define GD32_DMA_CONFIG_PERIPHERAL_INC_FIXED(config) ((config >> 15) & 0x1) argument
16 #define GD32_DMA_CONFIG_PRIORITY(config) ((config >> 16) & 0x3) argument
/Zephyr-Core-3.7.0/drivers/i2c/
Di2c_npcx_port.c57 const struct i2c_npcx_port_config *const config = dev->config; in i2c_npcx_port_configure() local
59 if (config->i2c_ctrl == NULL) { in i2c_npcx_port_configure()
61 config->port); in i2c_npcx_port_configure()
74 return npcx_i2c_ctrl_configure(config->i2c_ctrl, dev_config); in i2c_npcx_port_configure()
79 const struct i2c_npcx_port_config *const config = dev->config; in i2c_npcx_port_get_config() local
83 if (config->i2c_ctrl == NULL) { in i2c_npcx_port_get_config()
84 LOG_ERR("Cannot find i2c controller on port%02x!", config->port); in i2c_npcx_port_get_config()
88 ret = npcx_i2c_ctrl_get_speed(config->i2c_ctrl, &speed); in i2c_npcx_port_get_config()
99 const struct i2c_npcx_port_config *const config = dev->config; in i2c_npcx_port_transfer() local
101 int idx_ctrl = (config->port & 0xF0) >> 4; in i2c_npcx_port_transfer()
[all …]
/Zephyr-Core-3.7.0/drivers/regulator/
Dregulator_axp192.c176 const struct regulator_axp192_config *config = dev->config; in axp192_enable() local
179 LOG_INST_DBG(config->log, "Enabling regulator"); in axp192_enable()
180 LOG_INST_DBG(config->log, "[0x%02x]=0x%02x mask=0x%02x", config->desc->enable_reg, in axp192_enable()
181 config->desc->enable_val, config->desc->enable_mask); in axp192_enable()
184 if (config->desc->enable_reg == AXP192_REG_GPIO0_CONTROL) { in axp192_enable()
185 ret = mfd_axp192_gpio_func_ctrl(config->mfd, dev, 0, AXP192_GPIO_FUNC_LDO); in axp192_enable()
187 ret = i2c_reg_update_byte_dt(&config->i2c, config->desc->enable_reg, in axp192_enable()
188 config->desc->enable_mask, config->desc->enable_val); in axp192_enable()
192 LOG_INST_ERR(config->log, "Failed to enable regulator"); in axp192_enable()
200 const struct regulator_axp192_config *config = dev->config; in axp192_disable() local
[all …]
Dregulator_common.c30 const struct regulator_common_config *config = dev->config; in regulator_common_init() local
35 if (config->initial_mode != REGULATOR_INITIAL_MODE_UNKNOWN) { in regulator_common_init()
36 ret = regulator_set_mode(dev, config->initial_mode); in regulator_common_init()
42 if (REGULATOR_ACTIVE_DISCHARGE_GET_BITS(config->flags) != in regulator_common_init()
45 (bool)REGULATOR_ACTIVE_DISCHARGE_GET_BITS(config->flags)); in regulator_common_init()
51 if (config->init_uv > INT32_MIN) { in regulator_common_init()
52 ret = regulator_set_voltage(dev, config->init_uv, config->init_uv); in regulator_common_init()
58 if (config->init_ua > INT32_MIN) { in regulator_common_init()
59 ret = regulator_set_current_limit(dev, config->init_ua, config->init_ua); in regulator_common_init()
66 if ((config->min_uv > INT32_MIN) || (config->max_uv < INT32_MAX)) { in regulator_common_init()
[all …]
/Zephyr-Core-3.7.0/drivers/serial/
Duart_rzt2m.c39 if (!dev || !dev->config || !dev->data) { in rzt2m_poll_in()
43 const struct rzt2m_device_config *config = dev->config; in rzt2m_poll_in() local
48 if (FRSR_R(*FRSR(config->base)) == 0) { in rzt2m_poll_in()
52 *c = *RDR(config->base) & RDR_MASK_RDAT; in rzt2m_poll_in()
53 *CFCLR(config->base) |= CFCLR_MASK_RDRFC; in rzt2m_poll_in()
55 if (FRSR_R(*FRSR(config->base)) == 0) { in rzt2m_poll_in()
56 *FFCLR(config->base) |= FFCLR_MASK_DRC; in rzt2m_poll_in()
65 if (!dev || !dev->config || !dev->data) { in rzt2m_poll_out()
69 const struct rzt2m_device_config *config = dev->config; in rzt2m_poll_out() local
74 int fifo_count = FTSR_T(*FTSR(config->base)); in rzt2m_poll_out()
[all …]
Duart_mcux_iuart.c39 const struct mcux_iuart_config *config = dev->config; in mcux_iuart_poll_in() local
42 if (UART_GetStatusFlag(config->base, kUART_RxDataReadyFlag)) { in mcux_iuart_poll_in()
43 *c = UART_ReadByte(config->base); in mcux_iuart_poll_in()
52 const struct mcux_iuart_config *config = dev->config; in mcux_iuart_poll_out() local
54 while (!(UART_GetStatusFlag(config->base, kUART_TxReadyFlag))) { in mcux_iuart_poll_out()
57 UART_WriteByte(config->base, c); in mcux_iuart_poll_out()
62 const struct mcux_iuart_config *config = dev->config; in mcux_iuart_err_check() local
65 if (UART_GetStatusFlag(config->base, kUART_RxOverrunFlag)) { in mcux_iuart_err_check()
67 UART_ClearStatusFlag(config->base, kUART_RxOverrunFlag); in mcux_iuart_err_check()
70 if (UART_GetStatusFlag(config->base, kUART_ParityErrorFlag)) { in mcux_iuart_err_check()
[all …]
Duart_cc32xx.c56 const struct uart_cc32xx_dev_config *config = dev->config; in uart_cc32xx_init() local
65 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); in uart_cc32xx_init()
71 MAP_UARTConfigSetExpClk(config->base, in uart_cc32xx_init()
76 MAP_UARTFlowControlSet(config->base, UART_FLOWCONTROL_NONE); in uart_cc32xx_init()
78 MAP_UARTFIFODisable(config->base); in uart_cc32xx_init()
82 MAP_UARTIntClear(config->base, UART_INT_RX); in uart_cc32xx_init()
84 config->irq_config_func(dev); in uart_cc32xx_init()
90 MAP_UARTCharPutNonBlocking(config->base, PRIME_CHAR); in uart_cc32xx_init()
97 const struct uart_cc32xx_dev_config *config = dev->config; in uart_cc32xx_poll_in() local
99 if (MAP_UARTCharsAvail(config->base)) { in uart_cc32xx_poll_in()
[all …]
Duart_psoc6.c104 const struct cypress_psoc6_config *config = dev->config; in uart_psoc6_init() local
107 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); in uart_psoc6_init()
113 Cy_SysClk_PeriphAssignDivider(config->periph_id, in uart_psoc6_init()
124 (void) Cy_SCB_UART_Init(config->base, &uartConfig, NULL); in uart_psoc6_init()
125 Cy_SCB_UART_Enable(config->base); in uart_psoc6_init()
128 config->irq_config_func(dev); in uart_psoc6_init()
136 const struct cypress_psoc6_config *config = dev->config; in uart_psoc6_poll_in() local
139 rec = Cy_SCB_UART_Get(config->base); in uart_psoc6_poll_in()
147 const struct cypress_psoc6_config *config = dev->config; in uart_psoc6_poll_out() local
149 while (Cy_SCB_UART_Put(config->base, (uint32_t)c) != 1UL) { in uart_psoc6_poll_out()
[all …]
Duart_mcux_lpsci.c38 const struct mcux_lpsci_config *config = dev->config; in mcux_lpsci_poll_in() local
39 uint32_t flags = LPSCI_GetStatusFlags(config->base); in mcux_lpsci_poll_in()
43 *c = LPSCI_ReadByte(config->base); in mcux_lpsci_poll_in()
52 const struct mcux_lpsci_config *config = dev->config; in mcux_lpsci_poll_out() local
54 while (!(LPSCI_GetStatusFlags(config->base) in mcux_lpsci_poll_out()
58 LPSCI_WriteByte(config->base, c); in mcux_lpsci_poll_out()
63 const struct mcux_lpsci_config *config = dev->config; in mcux_lpsci_err_check() local
64 uint32_t flags = LPSCI_GetStatusFlags(config->base); in mcux_lpsci_err_check()
79 LPSCI_ClearStatusFlags(config->base, kLPSCI_RxOverrunFlag | in mcux_lpsci_err_check()
91 const struct mcux_lpsci_config *config = dev->config; in mcux_lpsci_fifo_fill() local
[all …]
/Zephyr-Core-3.7.0/tests/kconfig/functions/
DKconfig4 config KCONFIG_ARITHMETIC_ADD_10
8 config KCONFIG_ARITHMETIC_ADD_10_3
12 config KCONFIG_ARITHMETIC_ADD_10_3_2
16 config KCONFIG_ARITHMETIC_SUB_10
20 config KCONFIG_ARITHMETIC_SUB_10_3
24 config KCONFIG_ARITHMETIC_SUB_10_3_2
28 config KCONFIG_ARITHMETIC_MUL_10
32 config KCONFIG_ARITHMETIC_MUL_10_3
36 config KCONFIG_ARITHMETIC_MUL_10_3_2
40 config KCONFIG_ARITHMETIC_DIV_10
[all …]
/Zephyr-Core-3.7.0/soc/espressif/common/
DKconfig.defconfig6 config GEN_ISR_TABLES
9 config GEN_SW_ISR_TABLE
12 config GEN_IRQ_VECTOR_TABLE
15 config DYNAMIC_INTERRUPTS
18 config ISR_STACK_SIZE
21 config ATOMIC_OPERATIONS_C
24 config SYS_CLOCK_HW_CYCLES_PER_SEC
27 config SYS_CLOCK_TICKS_PER_SEC
30 config MINIMAL_LIBC_OPTIMIZE_STRING_FOR_SIZE
33 config SOC_FLASH_ESP32
[all …]
/Zephyr-Core-3.7.0/drivers/usb_c/ppc/
Dusbc_ppc_numaker.c45 const struct numaker_ppc_config *const config = dev->config; in numaker_ppc_init() local
46 const struct device *tcpc_dev = config->tcpc_dev; in numaker_ppc_init()
66 const struct numaker_ppc_config *const config = dev->config; in numaker_ppc_is_dead_battery_mode() local
67 const struct device *tcpc_dev = config->tcpc_dev; in numaker_ppc_is_dead_battery_mode()
80 const struct numaker_ppc_config *const config = dev->config; in numaker_ppc_exit_dead_battery_mode() local
81 const struct device *tcpc_dev = config->tcpc_dev; in numaker_ppc_exit_dead_battery_mode()
95 const struct numaker_ppc_config *const config = dev->config; in numaker_ppc_is_vbus_source() local
96 const struct device *tcpc_dev = config->tcpc_dev; in numaker_ppc_is_vbus_source()
110 const struct numaker_ppc_config *const config = dev->config; in numaker_ppc_is_vbus_sink() local
111 const struct device *tcpc_dev = config->tcpc_dev; in numaker_ppc_is_vbus_sink()
[all …]
/Zephyr-Core-3.7.0/drivers/gpio/
Dgpio_ene_kb1200.c32 const struct gpio_kb1200_config *config = dev->config; in gpio_kb1200_isr() local
34 uint32_t pending_flag = config->gptd_regs->GPTDPF; in gpio_kb1200_isr()
37 config->gptd_regs->GPTDPF |= pending_flag; in gpio_kb1200_isr()
42 const struct gpio_kb1200_config *config = dev->config; in kb1200_gpio_pin_configure() local
44 WRITE_BIT(config->gpio_regs->GPIOFS, pin, 0); in kb1200_gpio_pin_configure()
46 WRITE_BIT(config->gpio_regs->GPIOIE, pin, 1); in kb1200_gpio_pin_configure()
49 WRITE_BIT(config->gpio_regs->GPIOOD, pin, 1); in kb1200_gpio_pin_configure()
52 WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0); in kb1200_gpio_pin_configure()
55 WRITE_BIT(config->gpio_regs->GPIOPU, pin, 1); in kb1200_gpio_pin_configure()
57 WRITE_BIT(config->gpio_regs->GPIOPU, pin, 0); in kb1200_gpio_pin_configure()
[all …]
/Zephyr-Core-3.7.0/drivers/pwm/
Dpwm_mcux.c46 const struct pwm_mcux_config *config = dev->config; in mcux_pwm_set_cycles_internal() local
63 if (clock_control_get_rate(config->clock_dev, config->clock_subsys, in mcux_pwm_set_cycles_internal()
70 PWM_StopTimer(config->base, 1U << config->index); in mcux_pwm_set_cycles_internal()
82 status = PWM_SetupPwm(config->base, config->index, in mcux_pwm_set_cycles_internal()
84 config->mode, 1U, clock_freq); in mcux_pwm_set_cycles_internal()
93 PWM_SetVALxValue(config->base, config->index, in mcux_pwm_set_cycles_internal()
96 PWM_SetVALxValue(config->base, config->index, in mcux_pwm_set_cycles_internal()
99 PWM_SetVALxValue(config->base, config->index, in mcux_pwm_set_cycles_internal()
101 PWM_SetVALxValue(config->base, config->index, in mcux_pwm_set_cycles_internal()
106 PWM_SetVALxValue(config->base, config->index, in mcux_pwm_set_cycles_internal()
[all …]
/Zephyr-Core-3.7.0/drivers/clock_control/
Dclock_control_nrf_auxpll.c37 const struct clock_control_nrf_auxpll_config *config = dev->config; in clock_control_nrf_auxpll_on() local
43 nrf_auxpll_task_trigger(config->auxpll, NRF_AUXPLL_TASK_START); in clock_control_nrf_auxpll_on()
46 locked = nrf_auxpll_mode_locked_check(config->auxpll); in clock_control_nrf_auxpll_on()
58 const struct clock_control_nrf_auxpll_config *config = dev->config; in clock_control_nrf_auxpll_off() local
62 nrf_auxpll_task_trigger(config->auxpll, NRF_AUXPLL_TASK_STOP); in clock_control_nrf_auxpll_off()
64 while (nrf_auxpll_running_check(config->auxpll)) { in clock_control_nrf_auxpll_off()
73 const struct clock_control_nrf_auxpll_config *config = dev->config; in clock_control_nrf_auxpll_get_rate() local
78 ratio = nrf_auxpll_static_ratio_get(config->auxpll); in clock_control_nrf_auxpll_get_rate()
80 *rate = (ratio * config->ref_clk_hz + in clock_control_nrf_auxpll_get_rate()
81 (config->ref_clk_hz * (uint64_t)config->frequency) / in clock_control_nrf_auxpll_get_rate()
[all …]
/Zephyr-Core-3.7.0/scripts/kconfig/
Ddiffconfig53 def print_config(op, config, value, new_value): argument
59 print("# CONFIG_%s is not set" % config)
61 print("CONFIG_%s=%s" % (config, new_value))
64 print("-%s %s" % (config, value))
66 print("+%s %s" % (config, new_value))
68 print(" %s %s -> %s" % (config, value, new_value))
108 for config in a:
109 if config not in b:
110 old.append(config)
112 for config in old:
[all …]
/Zephyr-Core-3.7.0/drivers/counter/
Dcounter_mcux_qtmr.c56 const struct mcux_qtmr_config *config = dev->config; in mcux_qtmr_timer_handler() local
58 uint32_t current = QTMR_GetCurrentTimerCount(config->base, config->channel); in mcux_qtmr_timer_handler()
60 QTMR_ClearStatusFlags(config->base, config->channel, status); in mcux_qtmr_timer_handler()
64 QTMR_DisableInterrupts(config->base, config->channel, in mcux_qtmr_timer_handler()
70 alarm_cb(dev, config->channel, current, data->alarm_user_data); in mcux_qtmr_timer_handler()
91 const struct mcux_qtmr_config *config = timers[ch]->config; in mcux_qtmr_isr() local
94 uint32_t channel_status = QTMR_GetStatus(config->base, ch); in mcux_qtmr_isr()
126 const struct mcux_qtmr_config *config = dev->config; in DT_INST_FOREACH_STATUS_OKAY() local
128 QTMR_StartTimer(config->base, config->channel, config->mode); in DT_INST_FOREACH_STATUS_OKAY()
135 const struct mcux_qtmr_config *config = dev->config; in mcux_qtmr_stop() local
[all …]
/Zephyr-Core-3.7.0/drivers/ps2/
Dps2_npcx_channel.c42 const struct ps2_npcx_ch_config *const config = dev->config; in ps2_npcx_ch_configure() local
45 ret = ps2_npcx_ctrl_configure(config->ps2_ctrl, config->channel_id, in ps2_npcx_ch_configure()
51 return ps2_npcx_ctrl_enable_interface(config->ps2_ctrl, in ps2_npcx_ch_configure()
52 config->channel_id, 1); in ps2_npcx_ch_configure()
57 const struct ps2_npcx_ch_config *const config = dev->config; in ps2_npcx_ch_write() local
59 return ps2_npcx_ctrl_write(config->ps2_ctrl, config->channel_id, value); in ps2_npcx_ch_write()
64 const struct ps2_npcx_ch_config *const config = dev->config; in ps2_npcx_ch_enable_interface() local
66 return ps2_npcx_ctrl_enable_interface(config->ps2_ctrl, in ps2_npcx_ch_enable_interface()
67 config->channel_id, 1); in ps2_npcx_ch_enable_interface()
72 const struct ps2_npcx_ch_config *const config = dev->config; in ps2_npcx_ch_inhibit_interface() local
[all …]
/Zephyr-Core-3.7.0/drivers/display/
Ddisplay_hx8394.c451 const struct hx8394_config *config = dev->config; in hx8394_blanking_off() local
453 if (config->bl_gpio.port != NULL) { in hx8394_blanking_off()
454 return gpio_pin_set_dt(&config->bl_gpio, 1); in hx8394_blanking_off()
462 const struct hx8394_config *config = dev->config; in hx8394_blanking_on() local
464 if (config->bl_gpio.port != NULL) { in hx8394_blanking_on()
465 return gpio_pin_set_dt(&config->bl_gpio, 0); in hx8394_blanking_on()
474 const struct hx8394_config *config = dev->config; in hx8394_set_pixel_format() local
476 if (pixel_format == config->pixel_format) { in hx8394_set_pixel_format()
486 const struct hx8394_config *config = dev->config; in hx8394_set_orientation() local
511 return hx8394_mipi_tx(config->mipi_dsi, config->channel, param, 2); in hx8394_set_orientation()
[all …]
/Zephyr-Core-3.7.0/drivers/dp/
Dswdp_bitbang.c90 const struct sw_config *config = dev->config; in pin_swclk_set() local
93 swdp_ll_pin_set(config->clk_reg, config->clk.pin); in pin_swclk_set()
95 gpio_pin_set_dt(&config->clk, 1); in pin_swclk_set()
102 const struct sw_config *config = dev->config; in pin_swclk_clr() local
105 swdp_ll_pin_clr(config->clk_reg, config->clk.pin); in pin_swclk_clr()
107 gpio_pin_set_dt(&config->clk, 0); in pin_swclk_clr()
114 const struct sw_config *config = dev->config; in pin_swdio_set() local
116 if (config->dout.port) { in pin_swdio_set()
118 swdp_ll_pin_set(config->dout_reg, config->dout.pin); in pin_swdio_set()
120 gpio_pin_set_dt(&config->dout, 1); in pin_swdio_set()
[all …]

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