Searched refs:clock_agilex5_ll (Results 1 – 1 of 1) sorted by relevance
24 static struct clock_agilex5_ll_params clock_agilex5_ll; variable30 clock_agilex5_ll.base_addr = base_addr; in clock_agilex5_ll_init()33 clock_agilex5_ll.mainpll_addr = clock_agilex5_ll.base_addr + CLKMGR_MAINPLL_OFFSET; in clock_agilex5_ll_init()36 clock_agilex5_ll.peripll_addr = clock_agilex5_ll.base_addr + CLKMGR_PERPLL_OFFSET; in clock_agilex5_ll_init()39 clock_agilex5_ll.ctl_addr = clock_agilex5_ll.base_addr + CLKMGR_INTEL_OFFSET; in clock_agilex5_ll_init()87 clk_psrc = sys_read32(clock_agilex5_ll.mainpll_addr + psrc_reg); in get_clk_freq()91 pllm_reg = clock_agilex5_ll.mainpll_addr + CLKMGR_MAINPLL_PLLM; in get_clk_freq()92 pllc_reg = clock_agilex5_ll.mainpll_addr + main_pllc; in get_clk_freq()93 pllglob_reg = clock_agilex5_ll.mainpll_addr + CLKMGR_MAINPLL_PLLGLOB; in get_clk_freq()97 pllm_reg = clock_agilex5_ll.peripll_addr + CLKMGR_PERPLL_PLLM; in get_clk_freq()[all …]
