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Searched refs:clk_sel (Results 1 – 4 of 4) sorted by relevance

/Zephyr-Core-3.7.0/drivers/clock_control/
Dclock_control_smartbond.c434 uint32_t clk_sel = 0; in z_smartbond_select_lp_clk() local
439 clk_sel = 0; in z_smartbond_select_lp_clk()
442 clk_sel = 1 << CRG_TOP_CLK_CTRL_REG_LP_CLK_SEL_Pos; in z_smartbond_select_lp_clk()
445 clk_sel = 2 << CRG_TOP_CLK_CTRL_REG_LP_CLK_SEL_Pos; in z_smartbond_select_lp_clk()
465 CRG_TOP->CLK_CTRL_REG = (CRG_TOP->CLK_CTRL_REG & ~clk_sel_msk) | clk_sel; in z_smartbond_select_lp_clk()
501 uint32_t clk_sel; in z_smartbond_select_sys_clk() local
516 clk_sel = 1 << CRG_TOP_CLK_CTRL_REG_SYS_CLK_SEL_Pos; in z_smartbond_select_sys_clk()
517 CRG_TOP->CLK_CTRL_REG = (CRG_TOP->CLK_CTRL_REG & ~clk_sel_msk) | clk_sel; in z_smartbond_select_sys_clk()
/Zephyr-Core-3.7.0/drivers/pwm/
Dpwm_mchp_xec_bbled.c129 uint8_t clk_sel; member
343 if (cfg->clk_sel == XEC_PWM_BBLED_CLKSEL_AHB_48M) { in pwm_bbled_xec_init()
361 .clk_sel = UTIL_CAT(XEC_PWM_BBLED_CLKSEL_, XEC_PWM_BBLED_CLKSEL(inst)), \
/Zephyr-Core-3.7.0/dts/arm/nuvoton/npcx/npcx4/
Dnpcx4-pinctrl.dtsi33 /omit-if-no-ref/ sio_clk_sel_96m: devctl3-sio-clk_sel-96m {
37 /omit-if-no-ref/ sio_clk_sel_100: devctl3-sio-clk_sel-100m {
41 /omit-if-no-ref/ sio_clk_sel_120m: devctl3-sio-clk_sel-120m {
45 /omit-if-no-ref/ sio_clk_sel_90m: devctl3-sio-clk_sel-90m {
/Zephyr-Core-3.7.0/drivers/counter/
Dcounter_sam_tc.c58 uint8_t clk_sel; member