| /Zephyr-Core-3.7.0/drivers/watchdog/ |
| D | wdt_ambiq.c | 23 uint8_t clk_freq; member
60 if (dev_cfg->clk_freq == 128) { in wdt_ambiq_setup()
62 } else if (dev_cfg->clk_freq == 16) { in wdt_ambiq_setup()
64 } else if (dev_cfg->clk_freq == 1) { in wdt_ambiq_setup()
76 if (dev_cfg->clk_freq == 128) { in wdt_ambiq_setup()
78 } else if (dev_cfg->clk_freq == 16) { in wdt_ambiq_setup()
80 } else if (dev_cfg->clk_freq == 1) { in wdt_ambiq_setup()
118 data->timeout = cfg->window.max / 1000 * dev_cfg->clk_freq; in wdt_ambiq_install_timeout()
156 if (dev_cfg->clk_freq != 128 && dev_cfg->clk_freq != 16 && dev_cfg->clk_freq != 1) { in wdt_ambiq_init()
186 .clk_freq = DT_INST_PROP(n, clock_frequency), \
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| D | wdt_opentitan.c | 25 uint32_t clk_freq; member
91 const uint64_t max_window = (uint64_t) UINT32_MAX * 1000 / dev_cfg->clk_freq; in ot_aontimer_install_timeout()
127 bark_thold = ((uint64_t) cfg->window.max * dev_cfg->clk_freq / 1000); in ot_aontimer_install_timeout()
128 bite_thold = ((uint64_t) bite->window.max * dev_cfg->clk_freq / 1000); in ot_aontimer_install_timeout()
140 bite_thold = ((uint64_t) cfg->window.max * dev_cfg->clk_freq / 1000); in ot_aontimer_install_timeout()
204 .clk_freq = DT_INST_PROP(0, clock_frequency),
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| D | wdt_dw.c | 27 uint32_t clk_freq; member
101 return dw_wdt_calc_period((uint32_t)reg_base, dev_data->clk_freq, config,
182 &dev_data->clk_freq);
271 (.clk_freq = DT_INST_PROP(inst, clock_frequency)), \
273 (.clk_freq = 0), \
274 (.clk_freq = DT_INST_PROP_BY_PHANDLE(inst, clocks, clock_frequency))))), \
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| D | wdt_intel_adsp.c | 60 uint32_t clk_freq; member
106 ret = dw_wdt_calc_period(dev_data->core_wdt[0], dev_config->clk_freq, config, in intel_adsp_wdt_install_timeout()
233 (.clk_freq = DT_PROP(DEV_NODE, clock_frequency)),
234 (.clk_freq = DT_PROP_BY_PHANDLE(DEV_NODE, clocks, clock_frequency))
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| D | wdt_dw_common.c | 58 int dw_wdt_calc_period(const uint32_t base, const uint32_t clk_freq, in dw_wdt_calc_period() argument
70 period64 = (uint64_t)clk_freq * config->window.max; in dw_wdt_calc_period()
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| D | wdt_dw_common.h | 43 int dw_wdt_calc_period(const uint32_t base, const uint32_t clk_freq,
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| D | wdt_wwdt_numaker.c | 62 uint32_t clk_freq; in m_wwdt_numaker_calc_ms() local
66 m_wwdt_numaker_clk_get_rate(cfg, &clk_freq); in m_wwdt_numaker_calc_ms()
68 period_ms = DIV_ROUND_UP(prescale_clks * MSEC_PER_SEC, clk_freq); in m_wwdt_numaker_calc_ms()
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| /Zephyr-Core-3.7.0/drivers/i2c/ |
| D | i2c_rv32m1_lpi2c.c | 48 uint32_t clk_freq; in rv32m1_lpi2c_configure() local
86 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_configure()
92 LPI2C_MasterSetBaudRate(config->base, clk_freq, baudrate); in rv32m1_lpi2c_configure()
213 uint32_t clk_freq, dev_cfg; in rv32m1_lpi2c_init() local
229 err = clock_control_get_rate(config->clock_dev, config->clock_subsys, &clk_freq); in rv32m1_lpi2c_init()
236 LPI2C_MasterInit(config->base, &master_config, clk_freq); in rv32m1_lpi2c_init()
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| D | i2c_esp32.c | 132 static i2c_clock_source_t i2c_get_clk_src(uint32_t clk_freq) in i2c_get_clk_src() argument
138 if (clk_freq <= (i2c_get_src_clk_freq(clk_srcs[i]) / 20)) { in i2c_get_clk_src()
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| /Zephyr-Core-3.7.0/drivers/counter/ |
| D | counter_mcux_ctimer.c | 203 uint32_t clk_freq = 0; in mcux_lpc_ctimer_get_freq() local
206 &clk_freq)) { in mcux_lpc_ctimer_get_freq()
215 return (clk_freq / (config->prescale + 1)); in mcux_lpc_ctimer_get_freq()
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| /Zephyr-Core-3.7.0/drivers/serial/ |
| D | uart_xlnx_ps.c | 232 uint32_t clk_freq = dev_cfg->sys_clk_freq; in set_baudrate() local
237 if ((baud != 0) && (clk_freq != 0)) { in set_baudrate()
239 if (clk_freq < 1000000U && baud > 4800U) { in set_baudrate()
246 generator = clk_freq / (baud * (divisor + 1)); in set_baudrate()
250 tmpbaud = clk_freq / (generator * (divisor + 1)); in set_baudrate()
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| D | uart_pl011.c | 63 uint32_t clk_freq; member
267 ret = pl011_set_baudrate(dev, data->clk_freq, cfg->baudrate); in pl011_runtime_configure_internal()
478 clock_control_get_rate(config->clock_dev, config->clock_id, &data->clk_freq); in pl011_init()
505 ret = config->clk_enable_func(dev, data->clk_freq); in pl011_init()
666 .clk_freq = COND_CODE_1( \
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| /Zephyr-Core-3.7.0/drivers/pwm/ |
| D | pwm_led_esp32.c | 275 uint64_t clk_freq; in pwm_led_esp32_set_cycles() local
286 ret = pwm_led_esp32_get_cycles_per_sec(dev, channel_idx, &clk_freq); in pwm_led_esp32_set_cycles()
291 channel->freq = (uint32_t) (clk_freq/period_cycles); in pwm_led_esp32_set_cycles()
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| D | pwm_mc_esp32.c | 223 uint64_t clk_freq; in mcpwm_esp32_set_cycles() local
234 mcpwm_esp32_get_cycles_per_sec(dev, channel_idx, &clk_freq); in mcpwm_esp32_set_cycles()
236 channel->freq = (uint32_t)(clk_freq / period_cycles); in mcpwm_esp32_set_cycles()
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| /Zephyr-Core-3.7.0/drivers/can/ |
| D | can_tcan4x5x.c | 228 uint32_t clk_freq; member
398 *rate = tcan_config->clk_freq; in tcan4x5x_get_core_clock()
683 if (tcan_config->clk_freq == MHZ(20)) { in tcan4x5x_init()
781 .clk_freq = DT_INST_PROP(inst, clock_frequency), \
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| /Zephyr-Core-3.7.0/drivers/clock_control/ |
| D | clock_control_litex.c | 1250 uint64_t m, clk_freq = 0; in litex_clk_calc_clkout_params() local
1260 clk_freq = vco_freq; in litex_clk_calc_clkout_params()
1261 clk_freq /= d; in litex_clk_calc_clkout_params()
1268 delta_f = clk_freq - lcko->ts_config.freq; in litex_clk_calc_clkout_params()
1271 lcko->config.freq = (uint32_t)clk_freq; in litex_clk_calc_clkout_params()
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