Searched refs:bclk (Results 1 – 3 of 3) sorted by relevance
| /Zephyr-Core-3.7.0/drivers/dai/intel/ssp/ |
| D | ssp.c | 424 static bool dai_ssp_find_mn(uint32_t freq, uint32_t bclk, uint32_t *out_scr_div, uint32_t *out_m, in dai_ssp_find_mn() argument
428 uint32_t scr_div = freq / bclk; in dai_ssp_find_mn()
430 LOG_INF("for freq %d bclk %d", freq, bclk); in dai_ssp_find_mn()
432 if (freq % bclk == 0 && scr_div < (SSCR0_SCR_MASK >> 8) + 1) { in dai_ssp_find_mn()
441 if ((bclk * 2) >= freq) { in dai_ssp_find_mn()
459 mn_div = dai_ssp_gcd(bclk, freq / scr_div); in dai_ssp_find_mn()
461 m = bclk / mn_div; in dai_ssp_find_mn()
487 static int dai_ssp_find_bclk_source(struct dai_intel_ssp *dp, uint32_t bclk, uint32_t *scr_div, in dai_ssp_find_bclk_source() argument
496 if (dai_ssp_find_mn(ft[mp->mclk_source_clock].freq, bclk, scr_div, m, n)) { in dai_ssp_find_bclk_source()
500 LOG_WRN("BCLK %d warning: cannot use MCLK source %d", bclk, in dai_ssp_find_bclk_source()
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| /Zephyr-Core-3.7.0/dts/arm/renesas/ra/ra8/ |
| D | r7fa8m1xh.dtsi | 133 bclk: bclk { label
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| /Zephyr-Core-3.7.0/drivers/clock_control/ |
| D | clock_control_renesas_ra.c | 54 SCKDIVCR_BITS(pclkc) | SCKDIVCR_BITS(pclkd) | SCKDIVCR_BITS(bclk) | SCKDIVCR_BITS(fclk))
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