Home
last modified time | relevance | path

Searched refs:XUARTPS_CR_OFFSET (Results 1 – 1 of 1) sorted by relevance

/Zephyr-latest/drivers/serial/
Duart_xlnx_ps.c46 #define XUARTPS_CR_OFFSET 0x0000U /**< Control Register [8:0] */ macro
184 uint32_t reg_val = sys_read32(reg_base + XUARTPS_CR_OFFSET); in xlnx_ps_disable_uart()
189 sys_write32(reg_val, reg_base + XUARTPS_CR_OFFSET); in xlnx_ps_disable_uart()
208 uint32_t reg_val = sys_read32(reg_base + XUARTPS_CR_OFFSET); in xlnx_ps_enable_uart()
213 sys_write32(reg_val, reg_base + XUARTPS_CR_OFFSET); in xlnx_ps_enable_uart()
324 reg_base + XUARTPS_CR_OFFSET); in uart_xlnx_ps_init()