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Searched refs:XTENSA_MMU_PDTLB_HIT (Results 1 – 1 of 1) sorted by relevance

/Zephyr-Core-3.7.0/arch/xtensa/include/
Dxtensa_mmu_priv.h169 #define XTENSA_MMU_PDTLB_HIT BIT(4) macro
505 if (entry & XTENSA_MMU_PDTLB_HIT) { in xtensa_dtlb_vaddr_invalidate()