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Searched refs:TS_DMIC_TSCC_OFFSET (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-3.7.0/soc/intel/intel_adsp/ace/include/
Ddmic_regs.h16 #define TS_DMIC_TSCC_OFFSET 0x018 macro
31 #define TS_DMIC_TSCC (TIMESTAMP_BASE + TS_DMIC_TSCC_OFFSET)
/Zephyr-Core-3.7.0/soc/intel/intel_adsp/cavs/include/cavs25/
Ddmic_regs.h16 #define TS_DMIC_TSCC_OFFSET 0x018 macro
31 #define TS_DMIC_TSCC (TIMESTAMP_BASE + TS_DMIC_TSCC_OFFSET)