Searched refs:STM32_SRC_HSE (Results 1 – 21 of 21) sorted by relevance
28 #define STM32_SRC_HSE (STM32_SRC_HSI48 + 1) macro30 #define STM32_SRC_PCLK (STM32_SRC_HSE + 1)
28 #define STM32_SRC_HSE (STM32_SRC_LSI + 1) macro29 #define STM32_SRC_HSI (STM32_SRC_HSE + 1)
32 #define STM32_SRC_HSE (STM32_SRC_MSI + 1) macro34 #define STM32_SRC_PCLK (STM32_SRC_HSE + 1)
19 #define STM32_SRC_HSE (STM32_SRC_LSI + 1) macro20 #define STM32_SRC_HSI16 (STM32_SRC_HSE + 1)
30 #define STM32_SRC_HSE (STM32_SRC_MSI + 1) macro32 #define STM32_SRC_PCLK (STM32_SRC_HSE + 1)
32 #define STM32_SRC_HSE (STM32_SRC_HSI48 + 1) macro33 #define STM32_SRC_MSI (STM32_SRC_HSE + 1)
26 #define STM32_SRC_HSE (STM32_SRC_LSI + 1) macro
20 #define STM32_SRC_HSE (STM32_SRC_LSI + 1) macro21 #define STM32_SRC_HSI48 (STM32_SRC_HSE + 1)
27 #define STM32_SRC_HSE (STM32_SRC_HSI + 1) macro
19 #define STM32_SRC_HSE (STM32_SRC_LSI + 1) macro20 #define STM32_SRC_CSI (STM32_SRC_HSE + 1)
19 clocks = <&rcc STM32_SRC_HSE CKPER_SEL(2)>;
21 <&rcc STM32_SRC_HSE NO_SEL>,
130 #if defined(STM32_SRC_HSE) in enabled_clock()131 case STM32_SRC_HSE: in enabled_clock()434 #if defined(STM32_SRC_HSE) in stm32_clock_control_get_subsys_rate()435 case STM32_SRC_HSE: in stm32_clock_control_get_subsys_rate()
48 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()252 case STM32_SRC_HSE: in stm32_clock_control_get_subsys_rate()
123 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()255 case STM32_SRC_HSE: in stm32_clock_control_get_subsys_rate()
127 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || in enabled_clock()269 case STM32_SRC_HSE: in stm32_clock_control_get_subsys_rate()
367 ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) ||533 case STM32_SRC_HSE:
98 } else if (perclk_dt_domain_clk == STM32_SRC_HSE) { in ZTEST()
223 <&rcc STM32_SRC_HSE FDCAN_SEL(0)>;
