Searched refs:REG_INT_SOURCE0 (Results 1 – 7 of 7) sorted by relevance
| /Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42688/ |
| D | icm42688_common.c | 128 res = icm42688_spi_single_write(&dev_cfg->spi, REG_INT_SOURCE0, 0); in icm42688_configure()
297 LOG_DBG("INT_SOURCE0 (0x%x) 0x%x", REG_INT_SOURCE0, int_source0); in icm42688_configure()
298 res = icm42688_spi_single_write(&dev_cfg->spi, REG_INT_SOURCE0, int_source0); in icm42688_configure()
308 LOG_DBG("INT_SOURCE0 (0x%x) 0x%x", REG_INT_SOURCE0, int_source0); in icm42688_configure()
309 res = icm42688_spi_single_write(&dev_cfg->spi, REG_INT_SOURCE0, int_source0); in icm42688_configure()
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| D | icm42688_trigger.c | 183 return icm42688_spi_single_write(&cfg->spi, REG_INT_SOURCE0, value); in icm42688_trigger_enable_interrupt()
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| D | icm42688_reg.h | 89 #define REG_INT_SOURCE0 (REG_BANK0_OFFSET | 0x65) macro
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| /Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42670/ |
| D | icm42670_trigger.c | 160 return icm42670_spi_single_write(&cfg->spi, REG_INT_SOURCE0, BIT_INT_DRDY_INT1_EN); in icm42670_trigger_enable_interrupt()
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| D | icm42670_reg.h | 65 #define REG_INT_SOURCE0 (REG_BANK0_OFFSET | 0x2b) macro
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| /Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42605/ |
| D | icm42605_setup.c | 278 result = inv_spi_single_write(&cfg->spi, REG_INT_SOURCE0, &int0_en); in icm42605_turn_on_fifo()
350 result = inv_spi_single_write(&cfg->spi, REG_INT_SOURCE0, &int0_en); in icm42605_turn_off_fifo()
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| D | icm42605_reg.h | 61 #define REG_INT_SOURCE0 0x65 macro
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