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Searched refs:REG_FSYNC_CONFIG (Results 1 – 3 of 3) sorted by relevance

/Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42670/
Dicm42670_reg.h96 #define REG_FSYNC_CONFIG (REG_MREG1_OFFSET | 0x03) macro
/Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42688/
Dicm42688_reg.h86 #define REG_FSYNC_CONFIG (REG_BANK0_OFFSET | 0x62) macro
Dicm42688_common.c208 res = icm42688_spi_single_write(&dev_cfg->spi, REG_FSYNC_CONFIG, 0); in icm42688_configure()