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Searched refs:REG_FIFO_CONFIG1 (Results 1 – 5 of 5) sorted by relevance

/Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42605/
Dicm42605_setup.c252 result = inv_spi_single_write(&cfg->spi, REG_FIFO_CONFIG1, &v); in icm42605_turn_on_fifo()
273 result = inv_spi_single_write(&cfg->spi, REG_FIFO_CONFIG1, &fifo_en); in icm42605_turn_on_fifo()
335 result = inv_spi_single_write(&cfg->spi, REG_FIFO_CONFIG1, &v); in icm42605_turn_off_fifo()
Dicm42605_reg.h55 #define REG_FIFO_CONFIG1 0x5F macro
/Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42688/
Dicm42688_common.c261 LOG_DBG("FIFO_CONFIG1 (0x%x) 0x%x", REG_FIFO_CONFIG1, fifo_cfg1); in icm42688_configure()
262 res = icm42688_spi_single_write(&dev_cfg->spi, REG_FIFO_CONFIG1, fifo_cfg1); in icm42688_configure()
Dicm42688_reg.h83 #define REG_FIFO_CONFIG1 (REG_BANK0_OFFSET | 0x5F) macro
/Zephyr-Core-3.7.0/drivers/sensor/tdk/icm42670/
Dicm42670_reg.h62 #define REG_FIFO_CONFIG1 (REG_BANK0_OFFSET | 0x28) macro